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1 /*
2 * Copyright (c) 2010, Applied Micro Circuits Corporation
3 * Author: Tirumala R Marri <tmarri@apm.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #include <asm-offsets.h>
9 #include <ppc_asm.tmpl>
10 #include <config.h>
11 #include <asm/mmu.h>
12 #include <asm/ppc4xx.h>
13
14 /**************************************************************************
15 * TLB TABLE
16 *
17 * This table is used by the cpu boot code to setup the initial tlb
18 * entries. Rather than make broad assumptions in the cpu source tree,
19 * this table lets each board set things up however they like.
20 *
21 * Pointer to the table is returned in r1
22 *
23 *************************************************************************/
24 .section .bootpg,"ax"
25 .globl tlbtab
26
27 tlbtab:
28 tlbtab_start
29
30 /* TLB 0 */
31 tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_16M, CONFIG_SYS_BOOT_BASE_ADDR,
32 4, AC_RWX | SA_G)
33
34 /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
35 tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR,
36 0, AC_RWX | SA_G)
37
38 /* TLB-entry for OCM */
39 tlbentry(CONFIG_SYS_OCM_BASE, SZ_64K, 0x00040000, 4,
40 AC_RWX | SA_I)
41
42 /* TLB-entry for Local Configuration registers => peripherals */
43 tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_16K,
44 CONFIG_SYS_PERIPHERAL_BASE, 4, AC_RWX | SA_IG)
45 tlbtab_end