3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * NOR and NAND boot options change bytes 5, 6, 8, 9, 11. The
32 * values are independent of the rest of the clock settings.
35 #define NAND_COMPATIBLE 0x01
36 #define NOR_COMPATIBLE 0x02
38 #define I2C_EEPROM_ADDR 0x52
40 static char *config_labels
[] = {
41 "CPU: 600 PLB: 200 OPB: 100 EBC: 100",
42 "CPU: 800 PLB: 200 OPB: 100 EBC: 100",
43 "CPU:1000 PLB: 200 OPB: 100 EBC: 100",
44 "CPU:1066 PLB: 266 OPB: 88 EBC: 88",
48 static u8 boot_configs
[][17] = {
50 (NAND_COMPATIBLE
| NOR_COMPATIBLE
),
51 0x86, 0x80, 0xce, 0x1f, 0x79, 0x80, 0x00, 0xa0, 0x40, 0x08,
52 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
55 (NAND_COMPATIBLE
| NOR_COMPATIBLE
),
56 0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0, 0x40, 0x08,
57 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
60 (NAND_COMPATIBLE
| NOR_COMPATIBLE
),
61 0x86, 0x82, 0x96, 0x19, 0xb9, 0x80, 0x00, 0xa0, 0x40, 0x08,
62 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
65 (NAND_COMPATIBLE
| NOR_COMPATIBLE
),
66 0x86, 0x80, 0xb3, 0x01, 0x9d, 0x80, 0x00, 0xa0, 0x40, 0x08,
67 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
71 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
76 * Bytes 5,6,8,9,11 change for NAND boot
80 * Values for 512 page size NAND chips, not used anymore, just
81 * keep them here for reference
83 static u8 nand_boot
[] = {
84 0x90, 0x01, 0xa0, 0x68, 0x58
88 * Values for 2k page size NAND chips
90 static u8 nand_boot
[] = {
91 0x90, 0x01, 0xa0, 0xe8, 0x58
95 static int do_bootstrap(cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
98 int x
, y
, nbytes
, selcfg
;
99 extern char console_buffer
[];
102 printf("Usage:\n%s\n", cmdtp
->usage
);
106 if ((strcmp(argv
[1], "nor") != 0) &&
107 (strcmp(argv
[1], "nand") != 0)) {
108 printf("Unsupported boot-device - only nor|nand support\n");
112 /* set the nand flag based on provided input */
113 if ((strcmp(argv
[1], "nand") == 0))
118 printf("Available configurations: \n\n");
121 for(x
= 0, y
= 0; boot_configs
[x
][0] != 0; x
++) {
122 /* filter on nand compatible */
123 if (boot_configs
[x
][0] & NAND_COMPATIBLE
) {
124 printf(" %d - %s\n", (y
+1), config_labels
[x
]);
129 for(x
= 0, y
= 0; boot_configs
[x
][0] != 0; x
++) {
130 /* filter on nor compatible */
131 if (boot_configs
[x
][0] & NOR_COMPATIBLE
) {
132 printf(" %d - %s\n", (y
+1), config_labels
[x
]);
139 nbytes
= readline(" Selection [1-x / quit]: ");
142 if (strcmp(console_buffer
, "quit") == 0)
144 selcfg
= simple_strtol(console_buffer
, NULL
, 10);
145 if ((selcfg
< 1) || (selcfg
> y
))
148 } while (nbytes
== 0);
153 for (x
= 0; boot_configs
[x
][0] != 0; x
++) {
155 if (boot_configs
[x
][0] & NAND_COMPATIBLE
) {
162 if (boot_configs
[x
][0] & NOR_COMPATIBLE
) {
171 buf
= &boot_configs
[x
][1];
174 buf
[5] = nand_boot
[0];
175 buf
[6] = nand_boot
[1];
176 buf
[8] = nand_boot
[2];
177 buf
[9] = nand_boot
[3];
178 buf
[11] = nand_boot
[4];
181 if (i2c_write(I2C_EEPROM_ADDR
, 0, 1, buf
, 16) != 0)
182 printf("Error writing to EEPROM at address 0x%x\n", I2C_EEPROM_ADDR
);
183 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
* 1000);
186 printf("Please power-cycle the board for the changes to take effect\n");
192 bootstrap
, 2, 0, do_bootstrap
,
193 "bootstrap - program the I2C bootstrap EEPROM\n",
194 "<nand|nor> - strap to boot from NAND or NOR flash\n"