board/atc/ti113x.c

   1 /*
   2  * (C) Copyright 2003-2005
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  *
  23  ********************************************************************
  24  *
  25  * Lots of code copied from:
  26  *
  27  * i82365.c 1.352 - Linux driver for Intel 82365 and compatible
  28  * PC Card controllers, and Yenta-compatible PCI-to-CardBus controllers.
  29  * (C) 1999 David A. Hinds <dahinds@users.sourceforge.net>
  30  */
  31
  32 #include <common.h>
  33
  34 #ifdef CONFIG_I82365
  35
  36 #include <command.h>
  37 #include <pci.h>
  38 #include <pcmcia.h>
  39 #include <asm/io.h>
  40
  41 #include <pcmcia/ss.h>
  42 #include <pcmcia/i82365.h>
  43 #include <pcmcia/yenta.h>
  44 #include <pcmcia/ti113x.h>
  45
  46 static struct pci_device_id supported[] = {
  47         {PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510},
  48         {0, 0}
  49 };
  50
  51 #define CYCLE_TIME      120
  52
  53 #ifdef DEBUG
  54 static void i82365_dump_regions (pci_dev_t dev);
  55 #endif
  56
  57 typedef struct socket_info_t {
  58         pci_dev_t       dev;
  59         u_short         bcr;
  60         u_char          pci_lat, cb_lat, sub_bus, cache;
  61         u_int           cb_phys;
  62
  63         socket_cap_t    cap;
  64         u_short         type;
  65         u_int           flags;
  66         ti113x_state_t  state;
  67 } socket_info_t;
  68
  69 static socket_info_t socket;
  70 static socket_state_t state;
  71 static struct pccard_mem_map mem;
  72 static struct pccard_io_map io;
  73
  74 /*====================================================================*/
  75
  76 /* Some PCI shortcuts */
  77
  78 static int pci_readb (socket_info_t * s, int r, u_char * v)
  79 {
  80         return pci_read_config_byte (s->dev, r, v);
  81 }
  82 static int pci_writeb (socket_info_t * s, int r, u_char v)
  83 {
  84         return pci_write_config_byte (s->dev, r, v);
  85 }
  86 static int pci_readw (socket_info_t * s, int r, u_short * v)
  87 {
  88         return pci_read_config_word (s->dev, r, v);
  89 }
  90 static int pci_writew (socket_info_t * s, int r, u_short v)
  91 {
  92         return pci_write_config_word (s->dev, r, v);
  93 }
  94 static int pci_readl (socket_info_t * s, int r, u_int * v)
  95 {
  96         return pci_read_config_dword (s->dev, r, v);
  97 }
  98 static int pci_writel (socket_info_t * s, int r, u_int v)
  99 {
 100         return pci_write_config_dword (s->dev, r, v);
 101 }
 102
 103 /*====================================================================*/
 104
 105 #define cb_readb(s, r)          readb((s)->cb_phys + (r))
 106 #define cb_readl(s, r)          readl((s)->cb_phys + (r))
 107 #define cb_writeb(s, r, v)      writeb(v, (s)->cb_phys + (r))
 108 #define cb_writel(s, r, v)      writel(v, (s)->cb_phys + (r))
 109
 110 static u_char i365_get (socket_info_t * s, u_short reg)
 111 {
 112         return cb_readb (s, 0x0800 + reg);
 113 }
 114
 115 static void i365_set (socket_info_t * s, u_short reg, u_char data)
 116 {
 117         cb_writeb (s, 0x0800 + reg, data);
 118 }
 119
 120 static void i365_bset (socket_info_t * s, u_short reg, u_char mask)
 121 {
 122         i365_set (s, reg, i365_get (s, reg) | mask);
 123 }
 124
 125 static void i365_bclr (socket_info_t * s, u_short reg, u_char mask)
 126 {
 127         i365_set (s, reg, i365_get (s, reg) & ~mask);
 128 }
 129
 130 #if 0   /* not used */
 131 static void i365_bflip (socket_info_t * s, u_short reg, u_char mask, int b)
 132 {
 133         u_char d = i365_get (s, reg);
 134
 135         i365_set (s, reg, (b) ? (d | mask) : (d & ~mask));
 136 }
 137
 138 static u_short i365_get_pair (socket_info_t * s, u_short reg)
 139 {
 140         return (i365_get (s, reg) + (i365_get (s, reg + 1) << 8));
 141 }
 142 #endif  /* not used */
 143
 144 static void i365_set_pair (socket_info_t * s, u_short reg, u_short data)
 145 {
 146         i365_set (s, reg, data & 0xff);
 147         i365_set (s, reg + 1, data >> 8);
 148 }
 149
 150 /*======================================================================
 151
 152     Code to save and restore global state information for TI 1130 and
 153     TI 1131 controllers, and to set and report global configuration
 154     options.
 155
 156 ======================================================================*/
 157
 158 static void ti113x_get_state (socket_info_t * s)
 159 {
 160         ti113x_state_t *p = &s->state;
 161
 162         pci_readl (s, TI113X_SYSTEM_CONTROL, &p->sysctl);
 163         pci_readb (s, TI113X_CARD_CONTROL, &p->cardctl);
 164         pci_readb (s, TI113X_DEVICE_CONTROL, &p->devctl);
 165         pci_readb (s, TI1250_DIAGNOSTIC, &p->diag);
 166         pci_readl (s, TI12XX_IRQMUX, &p->irqmux);
 167 }
 168
 169 static void ti113x_set_state (socket_info_t * s)
 170 {
 171         ti113x_state_t *p = &s->state;
 172
 173         pci_writel (s, TI113X_SYSTEM_CONTROL, p->sysctl);
 174         pci_writeb (s, TI113X_CARD_CONTROL, p->cardctl);
 175         pci_writeb (s, TI113X_DEVICE_CONTROL, p->devctl);
 176         pci_writeb (s, TI1250_MULTIMEDIA_CTL, 0);
 177         pci_writeb (s, TI1250_DIAGNOSTIC, p->diag);
 178         pci_writel (s, TI12XX_IRQMUX, p->irqmux);
 179         i365_set_pair (s, TI113X_IO_OFFSET (0), 0);
 180         i365_set_pair (s, TI113X_IO_OFFSET (1), 0);
 181 }
 182
 183 static u_int ti113x_set_opts (socket_info_t * s)
 184 {
 185         ti113x_state_t *p = &s->state;
 186         u_int mask = 0xffff;
 187
 188         p->cardctl &= ~TI113X_CCR_ZVENABLE;
 189         p->cardctl |= TI113X_CCR_SPKROUTEN;
 190
 191         return mask;
 192 }
 193
 194 /*======================================================================
 195
 196     Routines to handle common CardBus options
 197
 198 ======================================================================*/
 199
 200 /* Default settings for PCI command configuration register */
 201 #define CMD_DFLT (PCI_COMMAND_IO|PCI_COMMAND_MEMORY| \
 202                   PCI_COMMAND_MASTER|PCI_COMMAND_WAIT)
 203
 204 static void cb_get_state (socket_info_t * s)
 205 {
 206         pci_readb (s, PCI_CACHE_LINE_SIZE, &s->cache);
 207         pci_readb (s, PCI_LATENCY_TIMER, &s->pci_lat);
 208         pci_readb (s, CB_LATENCY_TIMER, &s->cb_lat);
 209         pci_readb (s, CB_CARDBUS_BUS, &s->cap.cardbus);
 210         pci_readb (s, CB_SUBORD_BUS, &s->sub_bus);
 211         pci_readw (s, CB_BRIDGE_CONTROL, &s->bcr);
 212 }
 213
 214 static void cb_set_state (socket_info_t * s)
 215 {
 216         pci_writel (s, CB_LEGACY_MODE_BASE, 0);
 217         pci_writel (s, PCI_BASE_ADDRESS_0, s->cb_phys);
 218         pci_writew (s, PCI_COMMAND, CMD_DFLT);
 219         pci_writeb (s, PCI_CACHE_LINE_SIZE, s->cache);
 220         pci_writeb (s, PCI_LATENCY_TIMER, s->pci_lat);
 221         pci_writeb (s, CB_LATENCY_TIMER, s->cb_lat);
 222         pci_writeb (s, CB_CARDBUS_BUS, s->cap.cardbus);
 223         pci_writeb (s, CB_SUBORD_BUS, s->sub_bus);
 224         pci_writew (s, CB_BRIDGE_CONTROL, s->bcr);
 225 }
 226
 227 static void cb_set_opts (socket_info_t * s)
 228 {
 229         if (s->cache == 0)
 230                 s->cache = 8;
 231         if (s->pci_lat == 0)
 232                 s->pci_lat = 0xa8;
 233         if (s->cb_lat == 0)
 234                 s->cb_lat = 0xb0;
 235 }
 236
 237 /*======================================================================
 238
 239     Power control for Cardbus controllers: used both for 16-bit and
 240     Cardbus cards.
 241
 242 ======================================================================*/
 243
 244 static int cb_set_power (socket_info_t * s, socket_state_t * state)
 245 {
 246         u_int reg = 0;
 247
 248         /* restart card voltage detection if it seems appropriate */
 249         if ((state->Vcc == 0) && (state->Vpp == 0) &&
 250            !(cb_readl (s, CB_SOCKET_STATE) & CB_SS_VSENSE))
 251                 cb_writel (s, CB_SOCKET_FORCE, CB_SF_CVSTEST);
 252         switch (state->Vcc) {
 253         case 0:
 254                 reg = 0;
 255                 break;
 256         case 33:
 257                 reg = CB_SC_VCC_3V;
 258                 break;
 259         case 50:
 260                 reg = CB_SC_VCC_5V;
 261                 break;
 262         default:
 263                 return -1;
 264         }
 265         switch (state->Vpp) {
 266         case 0:
 267                 break;
 268         case 33:
 269                 reg |= CB_SC_VPP_3V;
 270                 break;
 271         case 50:
 272                 reg |= CB_SC_VPP_5V;
 273                 break;
 274         case 120:
 275                 reg |= CB_SC_VPP_12V;
 276                 break;
 277         default:
 278                 return -1;
 279         }
 280         if (reg != cb_readl (s, CB_SOCKET_CONTROL))
 281                 cb_writel (s, CB_SOCKET_CONTROL, reg);
 282
 283         return 0;
 284 }
 285
 286 /*======================================================================
 287
 288     Generic routines to get and set controller options
 289
 290 ======================================================================*/
 291
 292 static void get_bridge_state (socket_info_t * s)
 293 {
 294         ti113x_get_state (s);
 295         cb_get_state (s);
 296 }
 297
 298 static void set_bridge_state (socket_info_t * s)
 299 {
 300         cb_set_state (s);
 301         i365_set (s, I365_GBLCTL, 0x00);
 302         i365_set (s, I365_GENCTL, 0x00);
 303         ti113x_set_state (s);
 304 }
 305
 306 static void set_bridge_opts (socket_info_t * s)
 307 {
 308         ti113x_set_opts (s);
 309         cb_set_opts (s);
 310 }
 311
 312 /*====================================================================*/
 313 #define PD67_EXT_INDEX          0x2e    /* Extension index */
 314 #define PD67_EXT_DATA           0x2f    /* Extension data */
 315 #define PD67_EXD_VS1(s)         (0x01 << ((s)<<1))
 316
 317 #define pd67_ext_get(s, r) \
 318     (i365_set(s, PD67_EXT_INDEX, r), i365_get(s, PD67_EXT_DATA))
 319
 320 static int i365_get_status (socket_info_t * s, u_int * value)
 321 {
 322         u_int status;
 323
 324         status = i365_get (s, I365_IDENT);
 325         status = i365_get (s, I365_STATUS);
 326         *value = ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
 327         if (i365_get (s, I365_INTCTL) & I365_PC_IOCARD) {
 328                 *value |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
 329         } else {
 330                 *value |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
 331                 *value |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
 332         }
 333         *value |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
 334         *value |= (status & I365_CS_READY) ? SS_READY : 0;
 335         *value |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
 336
 337         status = cb_readl (s, CB_SOCKET_STATE);
 338         *value |= (status & CB_SS_32BIT) ? SS_CARDBUS : 0;
 339         *value |= (status & CB_SS_3VCARD) ? SS_3VCARD : 0;
 340         *value |= (status & CB_SS_XVCARD) ? SS_XVCARD : 0;
 341         *value |= (status & CB_SS_VSENSE) ? 0 : SS_PENDING;
 342         /* For now, ignore cards with unsupported voltage keys */
 343         if (*value & SS_XVCARD)
 344                 *value &= ~(SS_DETECT | SS_3VCARD | SS_XVCARD);
 345
 346         return 0;
 347 }       /* i365_get_status */
 348
 349 static int i365_set_socket (socket_info_t * s, socket_state_t * state)
 350 {
 351         u_char reg;
 352
 353         set_bridge_state (s);
 354
 355         /* IO card, RESET flag */
 356         reg = 0;
 357         reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
 358         reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
 359         i365_set (s, I365_INTCTL, reg);
 360
 361         reg = I365_PWR_NORESET;
 362         if (state->flags & SS_PWR_AUTO)
 363                 reg |= I365_PWR_AUTO;
 364         if (state->flags & SS_OUTPUT_ENA)
 365                 reg |= I365_PWR_OUT;
 366
 367         cb_set_power (s, state);
 368         reg |= i365_get (s, I365_POWER) & (I365_VCC_MASK | I365_VPP1_MASK);
 369
 370         if (reg != i365_get (s, I365_POWER))
 371                 i365_set (s, I365_POWER, reg);
 372
 373         return 0;
 374 }       /* i365_set_socket */
 375
 376 /*====================================================================*/
 377
 378 static int i365_set_mem_map (socket_info_t * s, struct pccard_mem_map *mem)
 379 {
 380         u_short base, i;
 381         u_char map;
 382
 383         debug ("i82365: SetMemMap(%d, %#2.2x, %d ns, %#5.5lx-%#5.5lx, %#5.5x)\n",
 384                 mem->map, mem->flags, mem->speed,
 385                 mem->sys_start, mem->sys_stop, mem->card_start);
 386
 387         map = mem->map;
 388         if ((map > 4) ||
 389             (mem->card_start > 0x3ffffff) ||
 390             (mem->sys_start > mem->sys_stop) ||
 391             (mem->speed > 1000)) {
 392                 return -1;
 393         }
 394
 395         /* Turn off the window before changing anything */
 396         if (i365_get (s, I365_ADDRWIN) & I365_ENA_MEM (map))
 397                 i365_bclr (s, I365_ADDRWIN, I365_ENA_MEM (map));
 398
 399         /* Take care of high byte, for PCI controllers */
 400         i365_set (s, CB_MEM_PAGE (map), mem->sys_start >> 24);
 401
 402         base = I365_MEM (map);
 403         i = (mem->sys_start >> 12) & 0x0fff;
 404         if (mem->flags & MAP_16BIT)
 405                 i |= I365_MEM_16BIT;
 406         if (mem->flags & MAP_0WS)
 407                 i |= I365_MEM_0WS;
 408         i365_set_pair (s, base + I365_W_START, i);
 409
 410         i = (mem->sys_stop >> 12) & 0x0fff;
 411         switch (mem->speed / CYCLE_TIME) {
 412         case 0:
 413                 break;
 414         case 1:
 415                 i |= I365_MEM_WS0;
 416                 break;
 417         case 2:
 418                 i |= I365_MEM_WS1;
 419                 break;
 420         default:
 421                 i |= I365_MEM_WS1 | I365_MEM_WS0;
 422                 break;
 423         }
 424         i365_set_pair (s, base + I365_W_STOP, i);
 425
 426         i = ((mem->card_start - mem->sys_start) >> 12) & 0x3fff;
 427         if (mem->flags & MAP_WRPROT)
 428                 i |= I365_MEM_WRPROT;
 429         if (mem->flags & MAP_ATTRIB)
 430                 i |= I365_MEM_REG;
 431         i365_set_pair (s, base + I365_W_OFF, i);
 432
 433         /* Turn on the window if necessary */
 434         if (mem->flags & MAP_ACTIVE)
 435                 i365_bset (s, I365_ADDRWIN, I365_ENA_MEM (map));
 436         return 0;
 437 }       /* i365_set_mem_map */
 438
 439 static int i365_set_io_map (socket_info_t * s, struct pccard_io_map *io)
 440 {
 441         u_char map, ioctl;
 442
 443         map = io->map;
 444         /* comment out: comparison is always false due to limited range of data type */
 445         if ((map > 1) || /* (io->start > 0xffff) || (io->stop > 0xffff) || */
 446             (io->stop < io->start))
 447                 return -1;
 448         /* Turn off the window before changing anything */
 449         if (i365_get (s, I365_ADDRWIN) & I365_ENA_IO (map))
 450                 i365_bclr (s, I365_ADDRWIN, I365_ENA_IO (map));
 451         i365_set_pair (s, I365_IO (map) + I365_W_START, io->start);
 452         i365_set_pair (s, I365_IO (map) + I365_W_STOP, io->stop);
 453         ioctl = i365_get (s, I365_IOCTL) & ~I365_IOCTL_MASK (map);
 454         if (io->speed)
 455                 ioctl |= I365_IOCTL_WAIT (map);
 456         if (io->flags & MAP_0WS)
 457                 ioctl |= I365_IOCTL_0WS (map);
 458         if (io->flags & MAP_16BIT)
 459                 ioctl |= I365_IOCTL_16BIT (map);
 460         if (io->flags & MAP_AUTOSZ)
 461                 ioctl |= I365_IOCTL_IOCS16 (map);
 462         i365_set (s, I365_IOCTL, ioctl);
 463         /* Turn on the window if necessary */
 464         if (io->flags & MAP_ACTIVE)
 465                 i365_bset (s, I365_ADDRWIN, I365_ENA_IO (map));
 466         return 0;
 467 }       /* i365_set_io_map */
 468
 469 /*====================================================================*/
 470
 471 static int i82365_init (void)
 472 {
 473         u_int val;
 474         int i;
 475
 476         if ((socket.dev = pci_find_devices (supported, 0)) < 0) {
 477                 /* Controller not found */
 478                 return 1;
 479         }
 480         debug ("i82365 Device Found!\n");
 481
 482         pci_read_config_dword (socket.dev, PCI_BASE_ADDRESS_0, &socket.cb_phys);
 483         socket.cb_phys &= ~0xf;
 484
 485         get_bridge_state (&socket);
 486         set_bridge_opts (&socket);
 487
 488         i = i365_get_status (&socket, &val);
 489
 490         if (val & SS_DETECT) {
 491                 if (val & SS_3VCARD) {
 492                         state.Vcc = state.Vpp = 33;
 493                         puts (" 3.3V card found: ");
 494                 } else if (!(val & SS_XVCARD)) {
 495                         state.Vcc = state.Vpp = 50;
 496                         puts (" 5.0V card found: ");
 497                 } else {
 498                         puts ("i82365: unsupported voltage key\n");
 499                         state.Vcc = state.Vpp = 0;
 500                 }
 501         } else {
 502                 /* No card inserted */
 503                 puts ("No card\n");
 504                 return 1;
 505         }
 506
 507         state.flags = SS_IOCARD | SS_OUTPUT_ENA;
 508         state.csc_mask = 0;
 509         state.io_irq = 0;
 510
 511         i365_set_socket (&socket, &state);
 512
 513         for (i = 500; i; i--) {
 514                 if ((i365_get (&socket, I365_STATUS) & I365_CS_READY))
 515                         break;
 516                 udelay (1000);
 517         }
 518
 519         if (i == 0) {
 520                 /* PC Card not ready for data transfer */
 521                 puts ("i82365 PC Card not ready for data transfer\n");
 522                 return 1;
 523         }
 524         debug (" PC Card ready for data transfer: ");
 525
 526         mem.map = 0;
 527         mem.flags = MAP_ATTRIB | MAP_ACTIVE;
 528         mem.speed = 300;
 529         mem.sys_start = CONFIG_SYS_PCMCIA_MEM_ADDR;
 530         mem.sys_stop = CONFIG_SYS_PCMCIA_MEM_ADDR + CONFIG_SYS_PCMCIA_MEM_SIZE - 1;
 531         mem.card_start = 0;
 532         i365_set_mem_map (&socket, &mem);
 533
 534         io.map = 0;
 535         io.flags = MAP_AUTOSZ | MAP_ACTIVE;
 536         io.speed = 0;
 537         io.start = 0x0100;
 538         io.stop = 0x010F;
 539         i365_set_io_map (&socket, &io);
 540
 541 #ifdef DEBUG
 542         i82365_dump_regions (socket.dev);
 543 #endif
 544
 545         return 0;
 546 }
 547
 548 static void i82365_exit (void)
 549 {
 550         io.map = 0;
 551         io.flags = 0;
 552         io.speed = 0;
 553         io.start = 0;
 554         io.stop = 0x1;
 555
 556         i365_set_io_map (&socket, &io);
 557
 558         mem.map = 0;
 559         mem.flags = 0;
 560         mem.speed = 0;
 561         mem.sys_start = 0;
 562         mem.sys_stop = 0x1000;
 563         mem.card_start = 0;
 564
 565         i365_set_mem_map (&socket, &mem);
 566
 567         socket.state.sysctl &= 0xFFFF00FF;
 568
 569         state.Vcc = state.Vpp = 0;
 570
 571         i365_set_socket (&socket, &state);
 572 }
 573
 574 int pcmcia_on (void)
 575 {
 576         u_int rc;
 577
 578         debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
 579
 580         rc = i82365_init();
 581         if (rc)
 582                 goto exit;
 583
 584         rc = check_ide_device(0);
 585         if (rc == 0)
 586                 goto exit;
 587
 588         i82365_exit();
 589
 590 exit:
 591         return rc;
 592 }
 593
 594 #if defined(CONFIG_CMD_PCMCIA)
 595 int pcmcia_off (void)
 596 {
 597         printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
 598
 599         i82365_exit();
 600
 601         return 0;
 602 }
 603 #endif
 604
 605 /*======================================================================
 606
 607     Debug stuff
 608
 609 ======================================================================*/
 610
 611 #ifdef DEBUG
 612 static void i82365_dump_regions (pci_dev_t dev)
 613 {
 614         u_int tmp[2];
 615         u_int *mem = (void *) socket.cb_phys;
 616         u_char *cis = (void *) CONFIG_SYS_PCMCIA_MEM_ADDR;
 617         u_char *ide = (void *) (CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_REG_OFFSET);
 618
 619         pci_read_config_dword (dev, 0x00, tmp + 0);
 620         pci_read_config_dword (dev, 0x80, tmp + 1);
 621
 622         printf ("PCI CONF: %08X ... %08X\n",
 623                 tmp[0], tmp[1]);
 624         printf ("PCI MEM:  ... %08X ... %08X\n",
 625                 mem[0x8 / 4], mem[0x800 / 4]);
 626         printf ("CIS:      ...%c%c%c%c%c%c%c%c...\n",
 627                 cis[0x38], cis[0x3a], cis[0x3c], cis[0x3e],
 628                 cis[0x40], cis[0x42], cis[0x44], cis[0x48]);
 629         printf ("CIS CONF: %02X %02X %02X ...\n",
 630                 cis[0x200], cis[0x202], cis[0x204]);
 631         printf ("IDE:      %02X %02X %02X %02X %02X %02X %02X %02X\n",
 632                 ide[0], ide[1], ide[2], ide[3],
 633                 ide[4], ide[5], ide[6], ide[7]);
 634 }
 635 #endif  /* DEBUG */
 636
 637 #endif /* CONFIG_I82365 */