board/atmel/at91sam9263ek/at91sam9263ek.c

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian@popies.net>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24
  25 #include <common.h>
  26 #include <asm/sizes.h>
  27 #include <asm/arch/at91sam9263.h>
  28 #include <asm/arch/at91sam9_smc.h>
  29 #include <asm/arch/at91_common.h>
  30 #include <asm/arch/at91_pmc.h>
  31 #include <asm/arch/at91_rstc.h>
  32 #include <asm/arch/at91_matrix.h>
  33 #include <asm/arch/at91_pio.h>
  34 #include <asm/arch/clk.h>
  35 #include <asm/io.h>
  36 #include <asm/arch/gpio.h>
  37 #include <asm/arch/hardware.h>
  38 #include <lcd.h>
  39 #include <atmel_lcdc.h>
  40 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
  41 #include <net.h>
  42 #endif
  43 #include <netdev.h>
  44
  45 DECLARE_GLOBAL_DATA_PTR;
  46
  47 /* ------------------------------------------------------------------------- */
  48 /*
  49  * Miscelaneous platform dependent initialisations
  50  */
  51
  52 #ifdef CONFIG_CMD_NAND
  53 static void at91sam9263ek_nand_hw_init(void)
  54 {
  55         unsigned long csa;
  56         at91_smc_t    *smc    = (at91_smc_t *) ATMEL_BASE_SMC0;
  57         at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
  58         at91_pmc_t    *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  59
  60         /* Enable CS3 */
  61         csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
  62         writel(csa, &matrix->csa[0]);
  63
  64         /* Enable CS3 */
  65
  66         /* Configure SMC CS3 for NAND/SmartMedia */
  67         writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
  68                 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
  69                 &smc->cs[3].setup);
  70
  71         writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
  72                 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
  73                 &smc->cs[3].pulse);
  74
  75         writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
  76                 &smc->cs[3].cycle);
  77         writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  78                 AT91_SMC_MODE_EXNW_DISABLE |
  79 #ifdef CONFIG_SYS_NAND_DBW_16
  80                        AT91_SMC_MODE_DBW_16 |
  81 #else /* CONFIG_SYS_NAND_DBW_8 */
  82                        AT91_SMC_MODE_DBW_8 |
  83 #endif
  84                        AT91_SMC_MODE_TDF_CYCLE(2),
  85                 &smc->cs[3].mode);
  86
  87         writel(1 << ATMEL_ID_PIOA | 1 << ATMEL_ID_PIOCDE,
  88                 &pmc->pcer);
  89
  90         /* Configure RDY/BSY */
  91         at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  92
  93         /* Enable NandFlash */
  94         at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  95 }
  96 #endif
  97
  98 #ifdef CONFIG_MACB
  99 static void at91sam9263ek_macb_hw_init(void)
 100 {
 101         unsigned long   erstl;
 102         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 103         at91_pio_t      *pio    = (at91_pio_t *) ATMEL_BASE_PIO;
 104         at91_rstc_t     *rstc   = (at91_rstc_t *) ATMEL_BASE_RSTC;
 105         /* Enable clock */
 106         writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
 107
 108         /*
 109          * Disable pull-up on:
 110          *      RXDV (PC25) => PHY normal mode (not Test mode)
 111          *      ERX0 (PE25) => PHY ADDR0
 112          *      ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0
 113          *
 114          * PHY has internal pull-down
 115          */
 116
 117         writel(1 << 25, &pio->pioc.pudr);
 118         writel((1 << 25) | (1 <<26), &pio->pioe.pudr);
 119
 120         erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
 121
 122         /* Need to reset PHY -> 500ms reset */
 123         writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) |
 124                 AT91_RSTC_MR_URSTEN, &rstc->mr);
 125
 126         writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
 127         /* Wait for end hardware reset */
 128         while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
 129                 ;
 130
 131         /* Restore NRST value */
 132         writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
 133
 134         /* Re-enable pull-up */
 135         writel(1 << 25, &pio->pioc.puer);
 136         writel((1 << 25) | (1 <<26), &pio->pioe.puer);
 137
 138         at91_macb_hw_init();
 139 }
 140 #endif
 141
 142 #ifdef CONFIG_LCD
 143 vidinfo_t panel_info = {
 144         vl_col:         240,
 145         vl_row:         320,
 146         vl_clk:         4965000,
 147         vl_sync:        ATMEL_LCDC_INVLINE_INVERTED |
 148                         ATMEL_LCDC_INVFRAME_INVERTED,
 149         vl_bpix:        3,
 150         vl_tft:         1,
 151         vl_hsync_len:   5,
 152         vl_left_margin: 1,
 153         vl_right_margin:33,
 154         vl_vsync_len:   1,
 155         vl_upper_margin:1,
 156         vl_lower_margin:0,
 157         mmio:           ATMEL_BASE_LCDC,
 158 };
 159
 160 void lcd_enable(void)
 161 {
 162         at91_set_pio_value(AT91_PIO_PORTA, 30, 1);  /* power up */
 163 }
 164
 165 void lcd_disable(void)
 166 {
 167         at91_set_pio_value(AT91_PIO_PORTA, 30, 0);  /* power down */
 168 }
 169
 170 static void at91sam9263ek_lcd_hw_init(void)
 171 {
 172         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 173
 174         at91_set_a_periph(AT91_PIO_PORTC, 1, 0);        /* LCDHSYNC */
 175         at91_set_a_periph(AT91_PIO_PORTC, 2, 0);        /* LCDDOTCK */
 176         at91_set_a_periph(AT91_PIO_PORTC, 3, 0);        /* LCDDEN */
 177         at91_set_b_periph(AT91_PIO_PORTB, 9, 0);        /* LCDCC */
 178         at91_set_a_periph(AT91_PIO_PORTC, 6, 0);        /* LCDD2 */
 179         at91_set_a_periph(AT91_PIO_PORTC, 7, 0);        /* LCDD3 */
 180         at91_set_a_periph(AT91_PIO_PORTC, 8, 0);        /* LCDD4 */
 181         at91_set_a_periph(AT91_PIO_PORTC, 9, 0);        /* LCDD5 */
 182         at91_set_a_periph(AT91_PIO_PORTC, 10, 0);       /* LCDD6 */
 183         at91_set_a_periph(AT91_PIO_PORTC, 11, 0);       /* LCDD7 */
 184         at91_set_a_periph(AT91_PIO_PORTC, 14, 0);       /* LCDD10 */
 185         at91_set_a_periph(AT91_PIO_PORTC, 15, 0);       /* LCDD11 */
 186         at91_set_a_periph(AT91_PIO_PORTC, 16, 0);       /* LCDD12 */
 187         at91_set_b_periph(AT91_PIO_PORTC, 12, 0);       /* LCDD13 */
 188         at91_set_a_periph(AT91_PIO_PORTC, 18, 0);       /* LCDD14 */
 189         at91_set_a_periph(AT91_PIO_PORTC, 19, 0);       /* LCDD15 */
 190         at91_set_a_periph(AT91_PIO_PORTC, 22, 0);       /* LCDD18 */
 191         at91_set_a_periph(AT91_PIO_PORTC, 23, 0);       /* LCDD19 */
 192         at91_set_a_periph(AT91_PIO_PORTC, 24, 0);       /* LCDD20 */
 193         at91_set_b_periph(AT91_PIO_PORTC, 17, 0);       /* LCDD21 */
 194         at91_set_a_periph(AT91_PIO_PORTC, 26, 0);       /* LCDD22 */
 195         at91_set_a_periph(AT91_PIO_PORTC, 27, 0);       /* LCDD23 */
 196
 197         writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
 198         gd->fb_base = ATMEL_BASE_SRAM0;
 199 }
 200
 201 #ifdef CONFIG_LCD_INFO
 202 #include <nand.h>
 203 #include <version.h>
 204
 205 #ifndef CONFIG_SYS_NO_FLASH
 206 extern flash_info_t flash_info[];
 207 #endif
 208
 209 void lcd_show_board_info(void)
 210 {
 211         ulong dram_size, nand_size;
 212 #ifndef CONFIG_SYS_NO_FLASH
 213         ulong flash_size;
 214 #endif
 215         int i;
 216         char temp[32];
 217
 218         lcd_printf ("%s\n", U_BOOT_VERSION);
 219         lcd_printf ("(C) 2008 ATMEL Corp\n");
 220         lcd_printf ("at91support@atmel.com\n");
 221         lcd_printf ("%s CPU at %s MHz\n",
 222                 ATMEL_CPU_NAME,
 223                 strmhz(temp, get_cpu_clk_rate()));
 224
 225         dram_size = 0;
 226         for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
 227                 dram_size += gd->bd->bi_dram[i].size;
 228         nand_size = 0;
 229         for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
 230                 nand_size += nand_info[i].size;
 231 #ifndef CONFIG_SYS_NO_FLASH
 232         flash_size = 0;
 233         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
 234                 flash_size += flash_info[i].size;
 235 #endif
 236         lcd_printf ("  %ld MB SDRAM, %ld MB NAND",
 237                 dram_size >> 20,
 238                 nand_size >> 20 );
 239 #ifndef CONFIG_SYS_NO_FLASH
 240         lcd_printf (",\n  %ld MB NOR",
 241                 flash_size >> 20);
 242 #endif
 243         lcd_puts ("\n");
 244 }
 245 #endif /* CONFIG_LCD_INFO */
 246 #endif
 247
 248 int board_early_init_f(void)
 249 {
 250         struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 251
 252         /* Enable clocks for all PIOs */
 253         writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
 254                 (1 << ATMEL_ID_PIOCDE),
 255                 &pmc->pcer);
 256
 257         at91_seriald_hw_init();
 258         return 0;
 259 }
 260
 261 int board_init(void)
 262 {
 263         /* arch number of AT91SAM9263EK-Board */
 264         gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK;
 265         /* adress of boot parameters */
 266         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 267
 268 #ifdef CONFIG_CMD_NAND
 269         at91sam9263ek_nand_hw_init();
 270 #endif
 271 #ifdef CONFIG_HAS_DATAFLASH
 272         at91_set_pio_output(AT91_PIO_PORTE, 20, 1);     /* select spi0 clock */
 273         at91_spi0_hw_init(1 << 0);
 274 #endif
 275 #ifdef CONFIG_MACB
 276         at91sam9263ek_macb_hw_init();
 277 #endif
 278 #ifdef CONFIG_USB_OHCI_NEW
 279         at91_uhp_hw_init();
 280 #endif
 281 #ifdef CONFIG_LCD
 282         at91sam9263ek_lcd_hw_init();
 283 #endif
 284         return 0;
 285 }
 286
 287 int dram_init(void)
 288 {
 289         gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
 290                 CONFIG_SYS_SDRAM_SIZE);
 291
 292         return 0;
 293 }
 294
 295 #ifdef CONFIG_RESET_PHY_R
 296 void reset_phy(void)
 297 {
 298 }
 299 #endif
 300
 301 int board_eth_init(bd_t *bis)
 302 {
 303         int rc = 0;
 304 #ifdef CONFIG_MACB
 305         rc = macb_eth_initialize(0, (void *) ATMEL_BASE_EMAC, 0x00);
 306 #endif
 307         return rc;
 308 }