board/atmel/atngw100/atngw100.c

   1 /*
   2  * Copyright (C) 2006 Atmel Corporation
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22 #include <common.h>
  23
  24 #include <asm/io.h>
  25 #include <asm/sdram.h>
  26 #include <asm/arch/clk.h>
  27 #include <asm/arch/gpio.h>
  28 #include <asm/arch/hmatrix.h>
  29 #include <asm/arch/portmux.h>
  30 #include <netdev.h>
  31
  32 DECLARE_GLOBAL_DATA_PTR;
  33
  34 static const struct sdram_config sdram_config = {
  35         .data_bits      = SDRAM_DATA_16BIT,
  36         .row_bits       = 13,
  37         .col_bits       = 9,
  38         .bank_bits      = 2,
  39         .cas            = 3,
  40         .twr            = 2,
  41         .trc            = 7,
  42         .trp            = 2,
  43         .trcd           = 2,
  44         .tras           = 5,
  45         .txsr           = 5,
  46         /* 7.81 us */
  47         .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
  48 };
  49
  50 int board_early_init_f(void)
  51 {
  52         /* Enable SDRAM in the EBI mux */
  53         hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
  54
  55         portmux_enable_ebi(16, 23, 0, PORTMUX_DRIVE_HIGH);
  56         portmux_enable_usart1(PORTMUX_DRIVE_MIN);
  57
  58 #if defined(CONFIG_MACB)
  59         portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
  60         portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
  61 #endif
  62 #if defined(CONFIG_MMC)
  63         portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
  64 #endif
  65 #if defined(CONFIG_ATMEL_SPI)
  66         portmux_enable_spi0(1 << 0, PORTMUX_DRIVE_LOW);
  67 #endif
  68
  69         return 0;
  70 }
  71
  72 phys_size_t initdram(int board_type)
  73 {
  74         unsigned long expected_size;
  75         unsigned long actual_size;
  76         void *sdram_base;
  77
  78         sdram_base = uncached(EBI_SDRAM_BASE);
  79
  80         expected_size = sdram_init(sdram_base, &sdram_config);
  81         actual_size = get_ram_size(sdram_base, expected_size);
  82
  83         if (expected_size != actual_size)
  84                 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
  85                                 actual_size >> 20, expected_size >> 20);
  86
  87         return actual_size;
  88 }
  89
  90 int board_early_init_r(void)
  91 {
  92         gd->bd->bi_phy_id[0] = 0x01;
  93         gd->bd->bi_phy_id[1] = 0x03;
  94         return 0;
  95 }
  96
  97 #ifdef CONFIG_CMD_NET
  98 int board_eth_init(bd_t *bi)
  99 {
 100         macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
 101         macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
 102         return 0;
 103 }
 104 #endif
 105
 106 /* SPI chip select control */
 107 #ifdef CONFIG_ATMEL_SPI
 108 #include <spi.h>
 109
 110 #define ATNGW100_DATAFLASH_CS_PIN       GPIO_PIN_PA(3)
 111
 112 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 113 {
 114         return bus == 0 && cs == 0;
 115 }
 116
 117 void spi_cs_activate(struct spi_slave *slave)
 118 {
 119         gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0);
 120 }
 121
 122 void spi_cs_deactivate(struct spi_slave *slave)
 123 {
 124         gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1);
 125 }
 126 #endif /* CONFIG_ATMEL_SPI */