2 * Copyright (C) 2017 Microchip Corporation
3 * Wenyou Yang <wenyou.yang@microchip.com>
5 * SPDX-License-Identifier: GPL-2.0+
9 #include <debug_uart.h>
15 #include <asm/arch/at91_common.h>
16 #include <asm/arch/atmel_pio4.h>
17 #include <asm/arch/atmel_mpddrc.h>
18 #include <asm/arch/atmel_sdhci.h>
19 #include <asm/arch/clk.h>
20 #include <asm/arch/gpio.h>
21 #include <asm/arch/sama5d2.h>
22 #include <asm/arch/sama5d2_smc.h>
24 DECLARE_GLOBAL_DATA_PTR
;
26 #ifdef CONFIG_NAND_ATMEL
27 static void board_nand_hw_init(void)
29 struct at91_smc
*smc
= (struct at91_smc
*)ATMEL_BASE_SMC
;
31 at91_periph_clk_enable(ATMEL_ID_HSMC
);
33 /* Configure SMC CS3 for NAND */
34 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
35 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1),
37 writel(AT91_SMC_PULSE_NWE(2) | AT91_SMC_PULSE_NCS_WR(3) |
38 AT91_SMC_PULSE_NRD(2) | AT91_SMC_PULSE_NCS_RD(3),
40 writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
42 writel(AT91_SMC_TIMINGS_TCLR(2) | AT91_SMC_TIMINGS_TADL(7) |
43 AT91_SMC_TIMINGS_TAR(2) | AT91_SMC_TIMINGS_TRR(3) |
44 AT91_SMC_TIMINGS_TWB(7) | AT91_SMC_TIMINGS_RBNSEL(3) |
45 AT91_SMC_TIMINGS_NFSEL(1), &smc
->cs
[3].timings
);
46 writel(AT91_SMC_MODE_RM_NRD
| AT91_SMC_MODE_WM_NWE
|
47 AT91_SMC_MODE_EXNW_DISABLE
|
49 AT91_SMC_MODE_TDF_CYCLE(3),
52 atmel_pio4_set_b_periph(AT91_PIO_PORTA
, 22, 0); /* D0 */
53 atmel_pio4_set_b_periph(AT91_PIO_PORTA
, 23, 0); /* D1 */
54 atmel_pio4_set_b_periph(AT91_PIO_PORTA
, 24, 0); /* D2 */
55 atmel_pio4_set_b_periph(AT91_PIO_PORTA
, 25, 0); /* D3 */
56 atmel_pio4_set_b_periph(AT91_PIO_PORTA
, 26, 0); /* D4 */
57 atmel_pio4_set_b_periph(AT91_PIO_PORTA
, 27, 0); /* D5 */
58 atmel_pio4_set_b_periph(AT91_PIO_PORTA
, 28, 0); /* D6 */
59 atmel_pio4_set_b_periph(AT91_PIO_PORTA
, 29, 0); /* D7 */
60 atmel_pio4_set_b_periph(AT91_PIO_PORTB
, 2, 0); /* RE */
61 atmel_pio4_set_b_periph(AT91_PIO_PORTA
, 30, 0); /* WE */
62 atmel_pio4_set_b_periph(AT91_PIO_PORTA
, 31, 1); /* NCS */
63 atmel_pio4_set_b_periph(AT91_PIO_PORTC
, 8, 1); /* RDY */
64 atmel_pio4_set_b_periph(AT91_PIO_PORTB
, 0, 1); /* ALE */
65 atmel_pio4_set_b_periph(AT91_PIO_PORTB
, 1, 1); /* CLE */
69 static void board_usb_hw_init(void)
71 atmel_pio4_set_pio_output(AT91_PIO_PORTB
, 12, 1);
74 #ifdef CONFIG_DEBUG_UART_BOARD_INIT
75 static void board_uart0_hw_init(void)
77 atmel_pio4_set_c_periph(AT91_PIO_PORTB
, 26, 1); /* URXD0 */
78 atmel_pio4_set_c_periph(AT91_PIO_PORTB
, 27, 0); /* UTXD0 */
80 at91_periph_clk_enable(ATMEL_ID_UART0
);
83 void board_debug_uart_init(void)
85 board_uart0_hw_init();
89 #ifdef CONFIG_BOARD_EARLY_INIT_F
90 int board_early_init_f(void)
92 #ifdef CONFIG_DEBUG_UART
101 /* address of boot parameters */
102 gd
->bd
->bi_boot_params
= CONFIG_SYS_SDRAM_BASE
+ 0x100;
104 #ifdef CONFIG_NAND_ATMEL
105 board_nand_hw_init();
107 #ifdef CONFIG_CMD_USB
115 gd
->ram_size
= get_ram_size((void *)CONFIG_SYS_SDRAM_BASE
,
116 CONFIG_SYS_SDRAM_SIZE
);
120 #define AT24MAC_MAC_OFFSET 0xfa
122 #ifdef CONFIG_MISC_INIT_R
123 int misc_init_r(void)
125 #ifdef CONFIG_I2C_EEPROM
126 at91_set_ethaddr(AT24MAC_MAC_OFFSET
);