board/bf518f-ezbrd/bf518f-ezbrd.c

   1 /*
   2  * U-boot - main board file
   3  *
   4  * Copyright (c) 2008-2009 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <common.h>
  10 #include <config.h>
  11 #include <command.h>
  12 #include <net.h>
  13 #include <netdev.h>
  14 #include <spi.h>
  15 #include <asm/blackfin.h>
  16 #include <asm/net.h>
  17 #include <asm/portmux.h>
  18 #include <asm/mach-common/bits/otp.h>
  19 #include <asm/sdh.h>
  20
  21 DECLARE_GLOBAL_DATA_PTR;
  22
  23 int checkboard(void)
  24 {
  25         printf("Board: ADI BF518F EZ-Board board\n");
  26         printf("       Support: http://blackfin.uclinux.org/\n");
  27         return 0;
  28 }
  29
  30 #if defined(CONFIG_BFIN_MAC)
  31 static void board_init_enetaddr(uchar *mac_addr)
  32 {
  33         bool valid_mac = false;
  34
  35 #if 0
  36         /* the MAC is stored in OTP memory page 0xDF */
  37         uint32_t ret;
  38         uint64_t otp_mac;
  39
  40         ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac);
  41         if (!(ret & OTP_MASTER_ERROR)) {
  42                 uchar *otp_mac_p = (uchar *)&otp_mac;
  43
  44                 for (ret = 0; ret < 6; ++ret)
  45                         mac_addr[ret] = otp_mac_p[5 - ret];
  46
  47                 if (is_valid_ether_addr(mac_addr))
  48                         valid_mac = true;
  49         }
  50 #endif
  51
  52         if (!valid_mac) {
  53                 puts("Warning: Generating 'random' MAC address\n");
  54                 bfin_gen_rand_mac(mac_addr);
  55         }
  56
  57         eth_setenv_enetaddr("ethaddr", mac_addr);
  58 }
  59
  60 /* Only the first run of boards had a KSZ switch */
  61 #if defined(CONFIG_BFIN_SPI) && __SILICON_REVISION__ == 0
  62 # define KSZ_POSSIBLE 1
  63 #else
  64 # define KSZ_POSSIBLE 0
  65 #endif
  66
  67 #define KSZ_MAX_HZ    5000000
  68
  69 #define KSZ_WRITE     0x02
  70 #define KSZ_READ      0x03
  71
  72 #define KSZ_REG_CHID  0x00      /* Register 0: Chip ID0 */
  73 #define KSZ_REG_STPID 0x01      /* Register 1: Chip ID1 / Start Switch */
  74 #define KSZ_REG_GC9   0x0b      /* Register 11: Global Control 9 */
  75 #define KSZ_REG_P3C0  0x30      /* Register 48: Port 3 Control 0 */
  76
  77 static int ksz8893m_transfer(struct spi_slave *slave, uchar dir, uchar reg,
  78                              uchar data, uchar result[3])
  79 {
  80         unsigned char dout[3] = { dir, reg, data, };
  81         return spi_xfer(slave, sizeof(dout) * 8, dout, result, SPI_XFER_BEGIN | SPI_XFER_END);
  82 }
  83
  84 static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data)
  85 {
  86         unsigned char din[3];
  87         return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din);
  88 }
  89
  90 static int ksz8893m_reg_read(struct spi_slave *slave, uchar reg)
  91 {
  92         int ret;
  93         unsigned char din[3];
  94         ret = ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
  95         return ret ? ret : din[2];
  96 }
  97
  98 static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)
  99 {
 100         return ksz8893m_reg_set(slave, reg, ksz8893m_reg_read(slave, reg) & mask);
 101 }
 102
 103 static int ksz8893m_reset(struct spi_slave *slave)
 104 {
 105         int ret = 0;
 106
 107         /* Disable STPID mode */
 108         ret |= ksz8893m_reg_clear(slave, KSZ_REG_GC9, 0x01);
 109
 110         /* Disable VLAN tag insert on Port3 */
 111         ret |= ksz8893m_reg_clear(slave, KSZ_REG_P3C0, 0x04);
 112
 113         /* Start switch */
 114         ret |= ksz8893m_reg_set(slave, KSZ_REG_STPID, 0x01);
 115
 116         return ret;
 117 }
 118
 119 static bool board_ksz_init(void)
 120 {
 121         static bool switch_is_alive = false;
 122
 123         if (!switch_is_alive) {
 124                 struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3);
 125                 if (slave) {
 126                         if (!spi_claim_bus(slave)) {
 127                                 bool phy_is_ksz = (ksz8893m_reg_read(slave, KSZ_REG_CHID) == 0x88);
 128                                 int ret = phy_is_ksz ? ksz8893m_reset(slave) : 0;
 129                                 switch_is_alive = (ret == 0);
 130                                 spi_release_bus(slave);
 131                         }
 132                         spi_free_slave(slave);
 133                 }
 134         }
 135
 136         return switch_is_alive;
 137 }
 138
 139 int board_eth_init(bd_t *bis)
 140 {
 141         if (KSZ_POSSIBLE) {
 142                 if (!board_ksz_init())
 143                         return 0;
 144         }
 145         return bfin_EMAC_initialize(bis);
 146 }
 147 #endif
 148
 149 int misc_init_r(void)
 150 {
 151 #ifdef CONFIG_BFIN_MAC
 152         uchar enetaddr[6];
 153         if (!eth_getenv_enetaddr("ethaddr", enetaddr))
 154                 board_init_enetaddr(enetaddr);
 155 #endif
 156
 157         return 0;
 158 }
 159
 160 int board_early_init_f(void)
 161 {
 162         /* connect async banks by default */
 163         const unsigned short pins[] = {
 164                 P_AMS2, P_AMS3, 0,
 165         };
 166         return peripheral_request_list(pins, "async");
 167 }
 168
 169 #ifdef CONFIG_BFIN_SDH
 170 int board_mmc_init(bd_t *bis)
 171 {
 172         return bfin_mmc_init(bis);
 173 }
 174 #endif