board/bf518f-ezbrd/bf518f-ezbrd.c

   1 /*
   2  * U-boot - main board file
   3  *
   4  * Copyright (c) 2008-2009 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <common.h>
  10 #include <config.h>
  11 #include <command.h>
  12 #include <net.h>
  13 #include <netdev.h>
  14 #include <spi.h>
  15 #include <asm/blackfin.h>
  16 #include <asm/net.h>
  17 #include <asm/portmux.h>
  18 #include <asm/mach-common/bits/otp.h>
  19 #include <asm/sdh.h>
  20
  21 DECLARE_GLOBAL_DATA_PTR;
  22
  23 int checkboard(void)
  24 {
  25         printf("Board: ADI BF518F EZ-Board board\n");
  26         printf("       Support: http://blackfin.uclinux.org/\n");
  27         return 0;
  28 }
  29
  30 #if defined(CONFIG_BFIN_MAC)
  31 static void board_init_enetaddr(uchar *mac_addr)
  32 {
  33         bool valid_mac = false;
  34
  35 #if 0
  36         /* the MAC is stored in OTP memory page 0xDF */
  37         uint32_t ret;
  38         uint64_t otp_mac;
  39
  40         ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac);
  41         if (!(ret & OTP_MASTER_ERROR)) {
  42                 uchar *otp_mac_p = (uchar *)&otp_mac;
  43
  44                 for (ret = 0; ret < 6; ++ret)
  45                         mac_addr[ret] = otp_mac_p[5 - ret];
  46
  47                 if (is_valid_ether_addr(mac_addr))
  48                         valid_mac = true;
  49         }
  50 #endif
  51
  52         if (!valid_mac) {
  53                 puts("Warning: Generating 'random' MAC address\n");
  54                 bfin_gen_rand_mac(mac_addr);
  55         }
  56
  57         eth_setenv_enetaddr("ethaddr", mac_addr);
  58 }
  59
  60 #define KSZ_MAX_HZ    5000000
  61
  62 #define KSZ_WRITE     0x02
  63 #define KSZ_READ      0x03
  64
  65 #define KSZ_REG_CHID  0x00      /* Register 0: Chip ID0 */
  66 #define KSZ_REG_STPID 0x01      /* Register 1: Chip ID1 / Start Switch */
  67 #define KSZ_REG_GC9   0x0b      /* Register 11: Global Control 9 */
  68 #define KSZ_REG_P3C0  0x30      /* Register 48: Port 3 Control 0 */
  69
  70 static int ksz8893m_transfer(struct spi_slave *slave, uchar dir, uchar reg,
  71                              uchar data, uchar result[3])
  72 {
  73         unsigned char dout[3] = { dir, reg, data, };
  74         return spi_xfer(slave, sizeof(dout) * 8, dout, result, SPI_XFER_BEGIN | SPI_XFER_END);
  75 }
  76
  77 static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data)
  78 {
  79         unsigned char din[3];
  80         return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din);
  81 }
  82
  83 static int ksz8893m_reg_read(struct spi_slave *slave, uchar reg)
  84 {
  85         int ret;
  86         unsigned char din[3];
  87         ret = ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
  88         return ret ? ret : din[2];
  89 }
  90
  91 static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)
  92 {
  93         return ksz8893m_reg_set(slave, reg, ksz8893m_reg_read(slave, reg) & mask);
  94 }
  95
  96 static int ksz8893m_reset(struct spi_slave *slave)
  97 {
  98         int ret = 0;
  99
 100         /* Disable STPID mode */
 101         ret |= ksz8893m_reg_clear(slave, KSZ_REG_GC9, 0x01);
 102
 103         /* Disable VLAN tag insert on Port3 */
 104         ret |= ksz8893m_reg_clear(slave, KSZ_REG_P3C0, 0x04);
 105
 106         /* Start switch */
 107         ret |= ksz8893m_reg_set(slave, KSZ_REG_STPID, 0x01);
 108
 109         return ret;
 110 }
 111
 112 int board_eth_init(bd_t *bis)
 113 {
 114         static bool switch_is_alive = false, phy_is_ksz = true;
 115         int ret;
 116
 117         if (!switch_is_alive) {
 118                 struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3);
 119                 if (slave) {
 120                         if (!spi_claim_bus(slave)) {
 121                                 phy_is_ksz = (ksz8893m_reg_read(slave, KSZ_REG_CHID) == 0x88);
 122                                 ret = phy_is_ksz ? ksz8893m_reset(slave) : 0;
 123                                 switch_is_alive = (ret == 0);
 124                                 spi_release_bus(slave);
 125                         }
 126                         spi_free_slave(slave);
 127                 }
 128         }
 129
 130         if (switch_is_alive)
 131                 return bfin_EMAC_initialize(bis);
 132         else
 133                 return -1;
 134 }
 135 #endif
 136
 137 int misc_init_r(void)
 138 {
 139 #ifdef CONFIG_BFIN_MAC
 140         uchar enetaddr[6];
 141         if (!eth_getenv_enetaddr("ethaddr", enetaddr))
 142                 board_init_enetaddr(enetaddr);
 143 #endif
 144
 145         return 0;
 146 }
 147
 148 int board_early_init_f(void)
 149 {
 150         /* connect async banks by default */
 151         const unsigned short pins[] = {
 152                 P_AMS2, P_AMS3, 0,
 153         };
 154         return peripheral_request_list(pins, "async");
 155 }
 156
 157 #ifdef CONFIG_BFIN_SDH
 158 int board_mmc_init(bd_t *bis)
 159 {
 160         return bfin_mmc_init(bis);
 161 }
 162 #endif