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1 /*
2 * (C) Copyright 2011 Comelit Group SpA
3 * Luca Ceresoli <luca.ceresoli@comelit.it>
4 *
5 * Based on board/ti/beagle/beagle.c:
6 * (C) Copyright 2004-2008
7 * Texas Instruments, <www.ti.com>
8 *
9 * Author :
10 * Sunil Kumar <sunilsaini05@gmail.com>
11 * Shashi Ranjan <shashiranjanmca05@gmail.com>
12 *
13 * Derived from Beagle Board and 3430 SDP code by
14 * Richard Woodruff <r-woodruff2@ti.com>
15 * Syed Mohammed Khasim <khasim@ti.com>
16 *
17 *
18 * SPDX-License-Identifier: GPL-2.0+
19 */
20 #include <common.h>
21 #include <netdev.h>
22 #include <twl4030.h>
23 #include <asm/io.h>
24 #include <asm/arch/mmc_host_def.h>
25 #include <asm/arch/omap3-regs.h>
26 #include <asm/arch/mux.h>
27 #include <asm/arch/mem.h>
28 #include <asm/arch/sys_proto.h>
29 #include <asm/gpio.h>
30 #include <asm/mach-types.h>
31 #include "dig297.h"
32
33 DECLARE_GLOBAL_DATA_PTR;
34
35 #ifdef CONFIG_CMD_NET
36 static void setup_net_chip(void);
37
38 #define NET_LAN9221_RESET_GPIO 12
39
40 /* GPMC CS 5 connected to an SMSC LAN9220 ethernet controller */
41 #define NET_LAN9220_GPMC_CONFIG1 (DEVICESIZE_16BIT)
42 #define NET_LAN9220_GPMC_CONFIG2 (CSWROFFTIME(8) | \
43 CSRDOFFTIME(7) | \
44 ADVONTIME(1))
45 #define NET_LAN9220_GPMC_CONFIG3 (ADVWROFFTIME(2) | \
46 ADVRDOFFTIME(2) | \
47 ADVONTIME(1))
48 #define NET_LAN9220_GPMC_CONFIG4 (WEOFFTIME(8) | \
49 WEONTIME(1) | \
50 OEOFFTIME(7)| \
51 OEONTIME(1))
52 #define NET_LAN9220_GPMC_CONFIG5 (PAGEBURSTACCESSTIME(0) | \
53 RDACCESSTIME(6) | \
54 WRCYCLETIME(0x1D) | \
55 RDCYCLETIME(0x1D))
56 #define NET_LAN9220_GPMC_CONFIG6 ((1 << 31) | \
57 WRACCESSTIME(0x1D) | \
58 WRDATAONADMUXBUS(3))
59
60 static const u32 gpmc_lan_config[] = {
61 NET_LAN9220_GPMC_CONFIG1,
62 NET_LAN9220_GPMC_CONFIG2,
63 NET_LAN9220_GPMC_CONFIG3,
64 NET_LAN9220_GPMC_CONFIG4,
65 NET_LAN9220_GPMC_CONFIG5,
66 NET_LAN9220_GPMC_CONFIG6,
67 /* CONFIG7: computed by enable_gpmc_cs_config() */
68 };
69 #endif /* CONFIG_CMD_NET */
70
71 /*
72 * Routine: board_init
73 * Description: Early hardware init.
74 */
75 int board_init(void)
76 {
77 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
78 /* boot param addr */
79 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
80
81 return 0;
82 }
83
84 /*
85 * Routine: misc_init_r
86 * Description: Configure board specific parts
87 */
88 int misc_init_r(void)
89 {
90 struct gpio *gpio1_base = (struct gpio *)OMAP34XX_GPIO1_BASE;
91 struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
92
93 twl4030_power_init();
94 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
95
96 /*
97 * GPIO list
98 * - 159 OUT (GPIO5+31): reset for remote camera interface connector.
99 * - 19 OUT (GPIO1+19): integrated speaker amplifier (1=on, 0=shdn).
100 * - 20 OUT (GPIO1+20): handset amplifier (1=on, 0=shdn).
101 */
102
103 /* Configure GPIOs to output */
104 writel(~(GPIO19 | GPIO20), &gpio1_base->oe);
105 writel(~(GPIO31), &gpio5_base->oe);
106
107 /* Set GPIO values */
108 writel((GPIO19 | GPIO20), &gpio1_base->setdataout);
109 writel(0, &gpio5_base->setdataout);
110
111 #if defined(CONFIG_CMD_NET)
112 setup_net_chip();
113 #endif
114
115 dieid_num_r();
116
117 return 0;
118 }
119
120 /*
121 * Routine: set_muxconf_regs
122 * Description: Setting up the configuration Mux registers specific to the
123 * hardware. Many pins need to be moved from protect to primary
124 * mode.
125 */
126 void set_muxconf_regs(void)
127 {
128 MUX_DIG297();
129 }
130
131 #ifdef CONFIG_GENERIC_MMC
132 int board_mmc_init(bd_t *bis)
133 {
134 return omap_mmc_init(0, 0, 0, -1, -1);
135 }
136 #endif
137
138 #ifdef CONFIG_CMD_NET
139 /*
140 * Routine: setup_net_chip
141 * Description: Setting up the configuration GPMC registers specific to the
142 * Ethernet hardware.
143 */
144 static void setup_net_chip(void)
145 {
146 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
147
148 /* Configure GPMC registers */
149 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
150 CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
151
152 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
153 writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
154 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
155 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
156 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
157 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
158 &ctrl_base->gpmc_nadv_ale);
159
160 /* Make GPIO 12 as output pin and send a magic pulse through it */
161 if (!gpio_request(NET_LAN9221_RESET_GPIO, "")) {
162 gpio_direction_output(NET_LAN9221_RESET_GPIO, 0);
163 gpio_set_value(NET_LAN9221_RESET_GPIO, 1);
164 udelay(1);
165 gpio_set_value(NET_LAN9221_RESET_GPIO, 0);
166 udelay(31000); /* Should be >= 30ms according to datasheet */
167 gpio_set_value(NET_LAN9221_RESET_GPIO, 1);
168 }
169 }
170 #endif /* CONFIG_CMD_NET */
171
172 int board_eth_init(bd_t *bis)
173 {
174 int rc = 0;
175 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
176 return rc;
177 }