board/compal/paz00/paz00.c

   1 /*
   2  * Copyright (c) 2010-2012, NVIDIA CORPORATION.  All rights reserved.
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0
   8  */
   9
  10 #include <common.h>
  11 #include <asm/io.h>
  12 #include <asm/arch/tegra.h>
  13 #include <asm/arch/pinmux.h>
  14 #include <asm/gpio.h>
  15
  16 #ifdef CONFIG_TEGRA_MMC
  17 /*
  18  * Routine: pin_mux_mmc
  19  * Description: setup the pin muxes/tristate values for the SDMMC(s)
  20  */
  21 void pin_mux_mmc(void)
  22 {
  23         /* SDMMC4: config 3, x8 on 2nd set of pins */
  24         pinmux_set_func(PMUX_PINGRP_ATB, PMUX_FUNC_SDIO4);
  25         pinmux_set_func(PMUX_PINGRP_GMA, PMUX_FUNC_SDIO4);
  26         pinmux_set_func(PMUX_PINGRP_GME, PMUX_FUNC_SDIO4);
  27
  28         pinmux_tristate_disable(PMUX_PINGRP_ATB);
  29         pinmux_tristate_disable(PMUX_PINGRP_GMA);
  30         pinmux_tristate_disable(PMUX_PINGRP_GME);
  31
  32         /* SDIO1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */
  33         pinmux_set_func(PMUX_PINGRP_SDIO1, PMUX_FUNC_SDIO1);
  34
  35         pinmux_tristate_disable(PMUX_PINGRP_SDIO1);
  36
  37         /* For power GPIO PV1 */
  38         pinmux_tristate_disable(PMUX_PINGRP_UAC);
  39         /* For CD GPIO PV5 */
  40         pinmux_tristate_disable(PMUX_PINGRP_GPV);
  41 }
  42 #endif
  43
  44 #ifdef CONFIG_LCD
  45 /* this is a weak define that we are overriding */
  46 void pin_mux_display(void)
  47 {
  48         debug("init display pinmux\n");
  49
  50         /* EN_VDD_PANEL GPIO A4 */
  51         pinmux_tristate_disable(PMUX_PINGRP_DAP2);
  52 }
  53 #endif