board/cpc45/cpc45.c

   1 /*
   2  * (C) Copyright 2001
   3  * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <mpc824x.h>
  26 #include <asm/processor.h>
  27 #include <pci.h>
  28
  29 int sysControlDisplay(int digit, uchar ascii_code);
  30 extern void Plx9030Init(void);
  31
  32         /* We have to clear the initial data area here. Couldn't have done it
  33          * earlier because DRAM had not been initialized.
  34          */
  35 int board_pre_init(void)
  36 {
  37
  38         /* enable DUAL UART Mode on CPC45 */
  39         *(uchar*)DUART_DCR |= 0x1;      /* set DCM bit */
  40
  41         return 0;
  42 }
  43
  44 int checkboard(void)
  45 {
  46 /*
  47         char  revision = BOARD_REV;
  48 */
  49         ulong busfreq  = get_bus_freq(0);
  50         char  buf[32];
  51
  52         printf("CPC45 ");
  53 /*
  54         printf("Revision %d ", revision);
  55 */
  56         printf("Local Bus at %s MHz\n", strmhz(buf, busfreq));
  57
  58         return 0;
  59 }
  60
  61 long int initdram(int board_type)
  62 {
  63         int              i, cnt;
  64         volatile uchar * base      = CFG_SDRAM_BASE;
  65         volatile ulong * addr;
  66         ulong            save[32];
  67         ulong            val, ret  = 0;
  68
  69         for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
  70
  71                 addr = (volatile ulong *)base + cnt;
  72                 save[i++] = *addr;
  73                 *addr = ~cnt;
  74         }
  75
  76         addr = (volatile ulong *)base;
  77         save[i] = *addr;
  78         *addr = 0;
  79
  80         if (*addr != 0) {
  81                 *addr = save[i];
  82                 goto Done;
  83         }
  84
  85         for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {
  86                 addr = (volatile ulong *)base + cnt;
  87                 val = *addr;
  88                 *addr = save[--i];
  89                 if (val != ~cnt) {
  90                         ulong new_bank0_end = cnt * sizeof(long) - 1;
  91                         ulong mear1  = mpc824x_mpc107_getreg(MEAR1);
  92                         ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
  93                         mear1 =  (mear1  & 0xFFFFFF00) |
  94                           ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
  95                         emear1 = (emear1 & 0xFFFFFF00) |
  96                           ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
  97                         mpc824x_mpc107_setreg(MEAR1,  mear1);
  98                         mpc824x_mpc107_setreg(EMEAR1, emear1);
  99
 100                         ret = cnt * sizeof(long);
 101                         goto Done;
 102                 }
 103         }
 104
 105         ret = CFG_MAX_RAM_SIZE;
 106 Done:
 107         return ret;
 108 }
 109
 110 /*
 111  * Initialize PCI Devices, report devices found.
 112  */
 113 #ifndef CONFIG_PCI_PNP
 114
 115 static struct pci_config_table pci_sandpoint_config_table[] = {
 116         { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
 117           pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
 118                                        PCI_ENET0_MEMADDR,
 119                                        PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
 120         { }
 121 };
 122 #endif
 123
 124
 125 struct pci_controller hose = {
 126 #ifndef CONFIG_PCI_PNP
 127         config_table: pci_sandpoint_config_table,
 128 #endif
 129 };
 130
 131 void pci_init_board(void)
 132 {
 133         pci_mpc824x_init(&hose);
 134
 135         /* init PCI_to_LOCAL Bus BRIDGE */
 136         Plx9030Init();
 137
 138         sysControlDisplay(0,' ');
 139         sysControlDisplay(1,'C');
 140         sysControlDisplay(2,'P');
 141         sysControlDisplay(3,'C');
 142         sysControlDisplay(4,' ');
 143         sysControlDisplay(5,'4');
 144         sysControlDisplay(6,'5');
 145         sysControlDisplay(7,' ');
 146
 147 }
 148
 149 /**************************************************************************
 150 *
 151 * sysControlDisplay - controls one of the Alphanum. Display digits.
 152 *
 153 * This routine will write an ASCII character to the display digit requested.
 154 *
 155 * SEE ALSO:
 156 *
 157 * RETURNS: NA
 158 */
 159
 160 int sysControlDisplay
 161     (
 162     int digit,                  /* number of digit 0..7 */
 163     uchar ascii_code            /* ASCII code */
 164     )
 165 {
 166         if ((digit < 0) || (digit > 7))
 167                 return (-1);
 168
 169         *((volatile uchar*)(DISP_CHR_RAM + digit)) = ascii_code;
 170
 171         return (0);
 172 }
 173