2 * (C) Copyright 2001-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/processor.h>
12 #if defined(CONFIG_ENV_IS_IN_FLASH)
13 # ifndef CONFIG_ENV_ADDR
14 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
16 # ifndef CONFIG_ENV_SIZE
17 # define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
19 # ifndef CONFIG_ENV_SECT_SIZE
20 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
24 #define FLASH_BANK_SIZE 0x800000
25 #define MAIN_SECT_SIZE 0x40000
26 #define PARAM_SECT_SIZE 0x8000
28 flash_info_t flash_info
[CONFIG_SYS_MAX_FLASH_BANKS
];
30 static int write_data (flash_info_t
* info
, ulong dest
, ulong
* data
);
31 static void write_via_fpu (vu_long
* addr
, ulong
* data
);
32 static __inline__
unsigned long get_msr (void);
33 static __inline__
void set_msr (unsigned long msr
);
35 /*---------------------------------------------------------------------*/
38 /*---------------------------------------------------------------------*/
40 #define DEBUGF(fmt,args...) printf(fmt ,##args)
42 #define DEBUGF(fmt,args...)
44 /*---------------------------------------------------------------------*/
46 /*-----------------------------------------------------------------------
49 unsigned long flash_init (void)
56 /* Enable flash writes on CPC45 */
58 tempChar
= BOARD_CTRL
;
60 tempChar
|= (B_CTRL_FWPT_1
| B_CTRL_FWRE_1
);
62 tempChar
&= ~(B_CTRL_FWPT_0
| B_CTRL_FWRE_0
);
64 BOARD_CTRL
= tempChar
;
66 __asm__
volatile ("sync\n eieio");
68 for (i
= 0; i
< CONFIG_SYS_MAX_FLASH_BANKS
; i
++) {
69 vu_long
*addr
= (vu_long
*) (CONFIG_SYS_FLASH_BASE
+ i
* FLASH_BANK_SIZE
);
73 __asm__
volatile ("sync\n eieio");
77 DEBUGF ("Flash bank # %d:\n"
78 "\tManuf. ID @ 0x%08lX: 0x%08lX\n"
79 "\tDevice ID @ 0x%08lX: 0x%08lX\n",
81 (ulong
) (&addr
[0]), addr
[0],
82 (ulong
) (&addr
[2]), addr
[2]);
85 if ((addr
[0] == addr
[1]) && (addr
[0] == INTEL_MANUFACT
) &&
86 (addr
[2] == addr
[3]) && (addr
[2] == INTEL_ID_28F160F3T
)) {
88 flash_info
[i
].flash_id
=
89 (FLASH_MAN_INTEL
& FLASH_VENDMASK
) |
90 (INTEL_ID_28F160F3T
& FLASH_TYPEMASK
);
92 } else if ((addr
[0] == addr
[1]) && (addr
[0] == INTEL_MANUFACT
)
93 && (addr
[2] == addr
[3])
94 && (addr
[2] == INTEL_ID_28F160C3T
)) {
96 flash_info
[i
].flash_id
=
97 (FLASH_MAN_INTEL
& FLASH_VENDMASK
) |
98 (INTEL_ID_28F160C3T
& FLASH_TYPEMASK
);
101 flash_info
[i
].flash_id
= FLASH_UNKNOWN
;
102 addr
[0] = 0xFFFFFFFF;
106 DEBUGF ("flash_id = 0x%08lX\n", flash_info
[i
].flash_id
);
108 addr
[0] = 0xFFFFFFFF;
110 flash_info
[i
].size
= FLASH_BANK_SIZE
;
111 flash_info
[i
].sector_count
= CONFIG_SYS_MAX_FLASH_SECT
;
112 memset (flash_info
[i
].protect
, 0, CONFIG_SYS_MAX_FLASH_SECT
);
113 for (j
= 0; j
< flash_info
[i
].sector_count
; j
++) {
115 flash_info
[i
].start
[j
] = CONFIG_SYS_FLASH_BASE
+
116 i
* FLASH_BANK_SIZE
+
117 (MAIN_SECT_SIZE
* 31) + (j
-
121 flash_info
[i
].start
[j
] = CONFIG_SYS_FLASH_BASE
+
122 i
* FLASH_BANK_SIZE
+
127 /* unlock sectors, if 160C3T */
129 for (j
= 0; j
< flash_info
[i
].sector_count
; j
++) {
130 tmpaddr
= (vu_long
*) flash_info
[i
].start
[j
];
132 if ((flash_info
[i
].flash_id
& FLASH_TYPEMASK
) ==
133 (INTEL_ID_28F160C3T
& FLASH_TYPEMASK
)) {
134 tmpaddr
[0] = 0x00600060;
135 tmpaddr
[0] = 0x00D000D0;
136 tmpaddr
[1] = 0x00600060;
137 tmpaddr
[1] = 0x00D000D0;
141 size
+= flash_info
[i
].size
;
143 addr
[0] = 0x00FF00FF;
144 addr
[1] = 0x00FF00FF;
147 /* Protect monitor and environment sectors
149 #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE + FLASH_BANK_SIZE
150 flash_protect (FLAG_PROTECT_SET
,
151 CONFIG_SYS_MONITOR_BASE
,
152 CONFIG_SYS_MONITOR_BASE
+ monitor_flash_len
- 1,
155 flash_protect (FLAG_PROTECT_SET
,
156 CONFIG_SYS_MONITOR_BASE
,
157 CONFIG_SYS_MONITOR_BASE
+ monitor_flash_len
- 1,
161 #if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
162 #if CONFIG_ENV_ADDR >= CONFIG_SYS_FLASH_BASE + FLASH_BANK_SIZE
163 flash_protect (FLAG_PROTECT_SET
,
165 CONFIG_ENV_ADDR
+ CONFIG_ENV_SIZE
- 1, &flash_info
[1]);
167 flash_protect (FLAG_PROTECT_SET
,
169 CONFIG_ENV_ADDR
+ CONFIG_ENV_SIZE
- 1, &flash_info
[0]);
177 /*-----------------------------------------------------------------------
179 void flash_print_info (flash_info_t
* info
)
183 switch ((i
= info
->flash_id
& FLASH_VENDMASK
)) {
184 case (FLASH_MAN_INTEL
& FLASH_VENDMASK
):
188 printf ("Unknown Vendor 0x%04x ", i
);
192 switch ((i
= info
->flash_id
& FLASH_TYPEMASK
)) {
193 case (INTEL_ID_28F160F3T
& FLASH_TYPEMASK
):
194 printf ("28F160F3T (16Mbit)\n");
197 case (INTEL_ID_28F160C3T
& FLASH_TYPEMASK
):
198 printf ("28F160C3T (16Mbit)\n");
202 printf ("Unknown Chip Type 0x%04x\n", i
);
207 printf (" Size: %ld MB in %d Sectors\n",
208 info
->size
>> 20, info
->sector_count
);
210 printf (" Sector Start Addresses:");
211 for (i
= 0; i
< info
->sector_count
; i
++) {
215 printf (" %08lX%s", info
->start
[i
],
216 info
->protect
[i
] ? " (RO)" : " ");
224 /*-----------------------------------------------------------------------
227 int flash_erase (flash_info_t
* info
, int s_first
, int s_last
)
229 int flag
, prot
, sect
;
230 ulong start
, now
, last
;
232 DEBUGF ("Erase flash bank %d sect %d ... %d\n",
233 info
- &flash_info
[0], s_first
, s_last
);
235 if ((s_first
< 0) || (s_first
> s_last
)) {
236 if (info
->flash_id
== FLASH_UNKNOWN
) {
237 printf ("- missing\n");
239 printf ("- no sectors to erase\n");
244 if ((info
->flash_id
& FLASH_VENDMASK
) !=
245 (FLASH_MAN_INTEL
& FLASH_VENDMASK
)) {
246 printf ("Can erase only Intel flash types - aborted\n");
251 for (sect
= s_first
; sect
<= s_last
; ++sect
) {
252 if (info
->protect
[sect
]) {
258 printf ("- Warning: %d protected sectors will not be erased!\n", prot
);
263 start
= get_timer (0);
265 /* Start erase on unprotected sectors */
266 for (sect
= s_first
; sect
<= s_last
; sect
++) {
267 if (info
->protect
[sect
] == 0) { /* not protected */
268 vu_long
*addr
= (vu_long
*) (info
->start
[sect
]);
270 DEBUGF ("Erase sect %d @ 0x%08lX\n",
273 /* Disable interrupts which might cause a timeout
276 flag
= disable_interrupts ();
278 addr
[0] = 0x00500050; /* clear status register */
279 addr
[0] = 0x00200020; /* erase setup */
280 addr
[0] = 0x00D000D0; /* erase confirm */
282 addr
[1] = 0x00500050; /* clear status register */
283 addr
[1] = 0x00200020; /* erase setup */
284 addr
[1] = 0x00D000D0; /* erase confirm */
286 /* re-enable interrupts if necessary */
288 enable_interrupts ();
290 /* wait at least 80us - let's wait 1 ms */
293 while (((addr
[0] & 0x00800080) != 0x00800080) ||
294 ((addr
[1] & 0x00800080) != 0x00800080)) {
295 if ((now
= get_timer (start
)) >
296 CONFIG_SYS_FLASH_ERASE_TOUT
) {
297 printf ("Timeout\n");
298 addr
[0] = 0x00B000B0; /* suspend erase */
299 addr
[0] = 0x00FF00FF; /* to read mode */
303 /* show that we're waiting */
304 if ((now
- last
) > 1000) { /* every second */
310 addr
[0] = 0x00FF00FF;
317 /*-----------------------------------------------------------------------
318 * Copy memory to flash, returns:
321 * 2 - Flash not erased
322 * 4 - Flash not identified
325 #define FLASH_WIDTH 8 /* flash bus width in bytes */
327 int write_buff (flash_info_t
* info
, uchar
* src
, ulong addr
, ulong cnt
)
332 ulong
*datah
= &data
[0];
333 ulong
*datal
= &data
[1];
335 DEBUGF ("Flash write_buff: @ 0x%08lx, src 0x%08lx len %ld\n",
336 addr
, (ulong
) src
, cnt
);
338 if (info
->flash_id
== FLASH_UNKNOWN
) {
343 set_msr (msr
| MSR_FP
);
345 wp
= (addr
& ~(FLASH_WIDTH
- 1)); /* get lower aligned address */
348 * handle unaligned start bytes
350 if ((l
= addr
- wp
) != 0) {
353 for (i
= 0, cp
= wp
; i
< l
; i
++, cp
++) {
355 *datah
= (*datah
<< 8) |
356 ((*datal
& 0xFF000000) >> 24);
359 *datal
= (*datal
<< 8) | (*(uchar
*) cp
);
361 for (; i
< FLASH_WIDTH
&& cnt
> 0; ++i
) {
365 *datah
= (*datah
<< 8) |
366 ((*datal
& 0xFF000000) >> 24);
369 *datal
= (*datal
<< 8) | tmp
;
374 for (; cnt
== 0 && i
< FLASH_WIDTH
; ++i
, ++cp
) {
376 *datah
= (*datah
<< 8) |
377 ((*datal
& 0xFF000000) >> 24);
380 *datal
= (*datah
<< 8) | (*(uchar
*) cp
);
383 if ((rc
= write_data (info
, wp
, data
)) != 0) {
392 * handle FLASH_WIDTH aligned part
394 while (cnt
>= FLASH_WIDTH
) {
395 *datah
= *(ulong
*) src
;
396 *datal
= *(ulong
*) (src
+ 4);
397 if ((rc
= write_data (info
, wp
, data
)) != 0) {
412 * handle unaligned tail bytes
415 for (i
= 0, cp
= wp
; i
< FLASH_WIDTH
&& cnt
> 0; ++i
, ++cp
) {
419 *datah
= (*datah
<< 8) | ((*datal
& 0xFF000000) >>
423 *datal
= (*datal
<< 8) | tmp
;
427 for (; i
< FLASH_WIDTH
; ++i
, ++cp
) {
429 *datah
= (*datah
<< 8) | ((*datal
& 0xFF000000) >>
433 *datal
= (*datal
<< 8) | (*(uchar
*) cp
);
436 rc
= write_data (info
, wp
, data
);
442 /*-----------------------------------------------------------------------
443 * Write a word to Flash, returns:
446 * 2 - Flash not erased
448 static int write_data (flash_info_t
* info
, ulong dest
, ulong
* data
)
450 vu_long
*addr
= (vu_long
*) dest
;
454 /* Check if Flash is (sufficiently) erased */
455 if (((addr
[0] & data
[0]) != data
[0]) ||
456 ((addr
[1] & data
[1]) != data
[1])) {
459 /* Disable interrupts which might cause a timeout here */
460 flag
= disable_interrupts ();
462 addr
[0] = 0x00400040; /* write setup */
463 write_via_fpu (addr
, data
);
465 /* re-enable interrupts if necessary */
467 enable_interrupts ();
469 start
= get_timer (0);
471 while (((addr
[0] & 0x00800080) != 0x00800080) ||
472 ((addr
[1] & 0x00800080) != 0x00800080)) {
473 if (get_timer (start
) > CONFIG_SYS_FLASH_WRITE_TOUT
) {
474 addr
[0] = 0x00FF00FF; /* restore read mode */
479 addr
[0] = 0x00FF00FF; /* restore read mode */
484 /*-----------------------------------------------------------------------
486 static void write_via_fpu (vu_long
* addr
, ulong
* data
)
488 __asm__
__volatile__ ("lfd 1, 0(%0)"::"r" (data
));
489 __asm__
__volatile__ ("stfd 1, 0(%0)"::"r" (addr
));
492 /*-----------------------------------------------------------------------
494 static __inline__
unsigned long get_msr (void)
498 __asm__
__volatile__ ("mfmsr %0":"=r" (msr
):);
503 static __inline__
void set_msr (unsigned long msr
)
505 __asm__
__volatile__ ("mtmsr %0"::"r" (msr
));