3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/processor.h>
12 #if defined(CONFIG_ENV_IS_IN_FLASH)
13 # ifndef CONFIG_ENV_ADDR
14 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
16 # ifndef CONFIG_ENV_SIZE
17 # define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
19 # ifndef CONFIG_ENV_SECT_SIZE
20 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
24 #define FLASH_BANK_SIZE 0x800000
25 #define MAIN_SECT_SIZE 0x40000
26 #define PARAM_SECT_SIZE 0x8000
28 #define BOARD_CTRL_REG 0xFE800013
30 flash_info_t flash_info
[CONFIG_SYS_MAX_FLASH_BANKS
];
32 static int write_data (flash_info_t
*info
, ulong dest
, ulong
*data
);
33 static void write_via_fpu(vu_long
*addr
, ulong
*data
);
34 static __inline__
unsigned long get_msr(void);
35 static __inline__
void set_msr(unsigned long msr
);
37 /*---------------------------------------------------------------------*/
40 /*---------------------------------------------------------------------*/
42 #define DEBUGF(fmt,args...) printf(fmt ,##args)
44 #define DEBUGF(fmt,args...)
46 /*---------------------------------------------------------------------*/
48 /*-----------------------------------------------------------------------
51 unsigned long flash_init(void)
55 volatile unsigned char *bcr
= (volatile unsigned char *)(BOARD_CTRL_REG
);
57 DEBUGF("Write protect was: 0x%02X\n", *bcr
);
58 *bcr
&= 0x1; /* FWPT must be 0 */
59 *bcr
|= 0x6; /* FWP0 = FWP1 = 1 */
60 DEBUGF("Write protect is: 0x%02X\n", *bcr
);
62 for (i
= 0; i
< CONFIG_SYS_MAX_FLASH_BANKS
; i
++) {
63 vu_long
*addr
= (vu_long
*)(CONFIG_SYS_FLASH_BASE
+ i
* FLASH_BANK_SIZE
);
67 DEBUGF ("Flash bank # %d:\n"
68 "\tManuf. ID @ 0x%08lX: 0x%08lX\n"
69 "\tDevice ID @ 0x%08lX: 0x%08lX\n",
71 (ulong
)(&addr
[0]), addr
[0],
72 (ulong
)(&addr
[2]), addr
[2]);
74 if ((addr
[0] == addr
[1]) && (addr
[0] == INTEL_MANUFACT
) &&
75 (addr
[2] == addr
[3]) && (addr
[2] == INTEL_ID_28F160F3B
))
77 flash_info
[i
].flash_id
= (FLASH_MAN_INTEL
& FLASH_VENDMASK
) |
78 (INTEL_ID_28F160F3B
& FLASH_TYPEMASK
);
80 flash_info
[i
].flash_id
= FLASH_UNKNOWN
;
85 DEBUGF ("flash_id = 0x%08lX\n", flash_info
[i
].flash_id
);
89 flash_info
[i
].size
= FLASH_BANK_SIZE
;
90 flash_info
[i
].sector_count
= CONFIG_SYS_MAX_FLASH_SECT
;
91 memset(flash_info
[i
].protect
, 0, CONFIG_SYS_MAX_FLASH_SECT
);
92 for (j
= 0; j
< flash_info
[i
].sector_count
; j
++) {
94 flash_info
[i
].start
[j
] = CONFIG_SYS_FLASH_BASE
+
98 flash_info
[i
].start
[j
] = CONFIG_SYS_FLASH_BASE
+
100 (j
- 7)*MAIN_SECT_SIZE
;
103 size
+= flash_info
[i
].size
;
106 /* Protect monitor and environment sectors
108 #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
109 #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE + FLASH_BANK_SIZE
110 flash_protect(FLAG_PROTECT_SET
,
111 CONFIG_SYS_MONITOR_BASE
,
112 CONFIG_SYS_MONITOR_BASE
+ monitor_flash_len
- 1,
115 flash_protect(FLAG_PROTECT_SET
,
116 CONFIG_SYS_MONITOR_BASE
,
117 CONFIG_SYS_MONITOR_BASE
+ monitor_flash_len
- 1,
122 #if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
123 #if CONFIG_ENV_ADDR >= CONFIG_SYS_FLASH_BASE + FLASH_BANK_SIZE
124 flash_protect(FLAG_PROTECT_SET
,
126 CONFIG_ENV_ADDR
+ CONFIG_ENV_SIZE
- 1,
129 flash_protect(FLAG_PROTECT_SET
,
131 CONFIG_ENV_ADDR
+ CONFIG_ENV_SIZE
- 1,
140 /*-----------------------------------------------------------------------
142 void flash_print_info (flash_info_t
* info
)
146 switch ((i
= info
->flash_id
& FLASH_VENDMASK
)) {
147 case (FLASH_MAN_INTEL
& FLASH_VENDMASK
):
151 printf ("Unknown Vendor 0x%04x ", i
);
155 switch ((i
= info
->flash_id
& FLASH_TYPEMASK
)) {
156 case (INTEL_ID_28F160F3B
& FLASH_TYPEMASK
):
157 printf ("28F160F3B (16Mbit)\n");
160 printf ("Unknown Chip Type 0x%04x\n", i
);
165 printf (" Size: %ld MB in %d Sectors\n",
166 info
->size
>> 20, info
->sector_count
);
168 printf (" Sector Start Addresses:");
169 for (i
= 0; i
< info
->sector_count
; i
++) {
173 printf (" %08lX%s", info
->start
[i
],
174 info
->protect
[i
] ? " (RO)" : " ");
182 /*-----------------------------------------------------------------------
185 int flash_erase (flash_info_t
*info
, int s_first
, int s_last
)
187 int flag
, prot
, sect
;
188 ulong start
, now
, last
;
190 DEBUGF ("Erase flash bank %d sect %d ... %d\n",
191 info
- &flash_info
[0], s_first
, s_last
);
193 if ((s_first
< 0) || (s_first
> s_last
)) {
194 if (info
->flash_id
== FLASH_UNKNOWN
) {
195 printf ("- missing\n");
197 printf ("- no sectors to erase\n");
202 if ((info
->flash_id
& FLASH_VENDMASK
) !=
203 (FLASH_MAN_INTEL
& FLASH_VENDMASK
)) {
204 printf ("Can erase only Intel flash types - aborted\n");
209 for (sect
=s_first
; sect
<=s_last
; ++sect
) {
210 if (info
->protect
[sect
]) {
216 printf ("- Warning: %d protected sectors will not be erased!\n",
222 start
= get_timer (0);
224 /* Start erase on unprotected sectors */
225 for (sect
= s_first
; sect
<=s_last
; sect
++) {
226 if (info
->protect
[sect
] == 0) { /* not protected */
227 vu_long
*addr
= (vu_long
*)(info
->start
[sect
]);
229 DEBUGF ("Erase sect %d @ 0x%08lX\n",
232 /* Disable interrupts which might cause a timeout
235 flag
= disable_interrupts();
237 addr
[0] = 0x00500050; /* clear status register */
238 addr
[0] = 0x00200020; /* erase setup */
239 addr
[0] = 0x00D000D0; /* erase confirm */
241 addr
[1] = 0x00500050; /* clear status register */
242 addr
[1] = 0x00200020; /* erase setup */
243 addr
[1] = 0x00D000D0; /* erase confirm */
245 /* re-enable interrupts if necessary */
249 /* wait at least 80us - let's wait 1 ms */
252 while (((addr
[0] & 0x00800080) != 0x00800080) ||
253 ((addr
[1] & 0x00800080) != 0x00800080) ) {
254 if ((now
=get_timer(start
)) >
255 CONFIG_SYS_FLASH_ERASE_TOUT
) {
256 printf ("Timeout\n");
257 addr
[0] = 0x00B000B0; /* suspend erase */
258 addr
[0] = 0x00FF00FF; /* to read mode */
262 /* show that we're waiting */
263 if ((now
- last
) > 1000) { /* every second */
269 addr
[0] = 0x00FF00FF;
276 /*-----------------------------------------------------------------------
277 * Copy memory to flash, returns:
280 * 2 - Flash not erased
281 * 4 - Flash not identified
284 #define FLASH_WIDTH 8 /* flash bus width in bytes */
286 int write_buff (flash_info_t
*info
, uchar
*src
, ulong addr
, ulong cnt
)
291 ulong
*datah
= &data
[0];
292 ulong
*datal
= &data
[1];
294 DEBUGF ("Flash write_buff: @ 0x%08lx, src 0x%08lx len %ld\n",
295 addr
, (ulong
)src
, cnt
);
297 if (info
->flash_id
== FLASH_UNKNOWN
) {
302 set_msr(msr
| MSR_FP
);
304 wp
= (addr
& ~(FLASH_WIDTH
-1)); /* get lower aligned address */
307 * handle unaligned start bytes
309 if ((l
= addr
- wp
) != 0) {
312 for (i
= 0, cp
= wp
; i
< l
; i
++, cp
++) {
314 *datah
= (*datah
<< 8) |
315 ((*datal
& 0xFF000000) >> 24);
318 *datal
= (*datal
<< 8) | (*(uchar
*)cp
);
320 for (; i
< FLASH_WIDTH
&& cnt
> 0; ++i
) {
328 *datah
= (*datah
<< 8) |
329 ((*datal
& 0xFF000000) >> 24);
332 *datal
= (*datal
<< 8) | tmp
;
337 for (; cnt
== 0 && i
< FLASH_WIDTH
; ++i
, ++cp
) {
339 *datah
= (*datah
<< 8) |
340 ((*datal
& 0xFF000000) >> 24);
343 *datal
= (*datah
<< 8) | (*(uchar
*)cp
);
346 if ((rc
= write_data(info
, wp
, data
)) != 0) {
355 * handle FLASH_WIDTH aligned part
357 while (cnt
>= FLASH_WIDTH
) {
358 *datah
= *(ulong
*)src
;
359 *datal
= *(ulong
*)(src
+ 4);
360 if ((rc
= write_data(info
, wp
, data
)) != 0) {
375 * handle unaligned tail bytes
378 for (i
= 0, cp
= wp
; i
< FLASH_WIDTH
&& cnt
> 0; ++i
, ++cp
) {
386 *datah
= (*datah
<< 8) | ((*datal
& 0xFF000000) >> 24);
389 *datal
= (*datal
<< 8) | tmp
;
394 for (; i
< FLASH_WIDTH
; ++i
, ++cp
) {
396 *datah
= (*datah
<< 8) | ((*datal
& 0xFF000000) >> 24);
399 *datal
= (*datal
<< 8) | (*(uchar
*)cp
);
402 rc
= write_data(info
, wp
, data
);
408 /*-----------------------------------------------------------------------
409 * Write a word to Flash, returns:
412 * 2 - Flash not erased
414 static int write_data (flash_info_t
*info
, ulong dest
, ulong
*data
)
416 vu_long
*addr
= (vu_long
*)dest
;
420 /* Check if Flash is (sufficiently) erased */
421 if (((addr
[0] & data
[0]) != data
[0]) ||
422 ((addr
[1] & data
[1]) != data
[1]) ) {
425 /* Disable interrupts which might cause a timeout here */
426 flag
= disable_interrupts();
428 addr
[0] = 0x00400040; /* write setup */
429 write_via_fpu(addr
, data
);
431 /* re-enable interrupts if necessary */
435 start
= get_timer (0);
437 while (((addr
[0] & 0x00800080) != 0x00800080) ||
438 ((addr
[1] & 0x00800080) != 0x00800080) ) {
439 if (get_timer(start
) > CONFIG_SYS_FLASH_WRITE_TOUT
) {
440 addr
[0] = 0x00FF00FF; /* restore read mode */
445 addr
[0] = 0x00FF00FF; /* restore read mode */
450 /*-----------------------------------------------------------------------
452 static void write_via_fpu(vu_long
*addr
, ulong
*data
)
454 __asm__
__volatile__ ("lfd 1, 0(%0)" : : "r" (data
));
455 __asm__
__volatile__ ("stfd 1, 0(%0)" : : "r" (addr
));
457 /*-----------------------------------------------------------------------
459 static __inline__
unsigned long get_msr(void)
463 __asm__
__volatile__ ("mfmsr %0" : "=r" (msr
) :);
467 static __inline__
void set_msr(unsigned long msr
)
469 __asm__
__volatile__ ("mtmsr %0" : : "r" (msr
));