board/dave/B2/B2.c

   1 /*
   2  * (C) Copyright 2004
   3  * DAVE Srl
   4  * http://www.dave-tech.it
   5  * http://www.wawnet.biz
   6  * mailto:info@wawnet.biz
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #include <common.h>
  28 #include <asm/hardware.h>
  29
  30 /*
  31  * Miscelaneous platform dependent initialization
  32  */
  33
  34 int board_init (void)
  35 {
  36         DECLARE_GLOBAL_DATA_PTR;
  37         u32 temp;
  38
  39         /* Configuration Port Control Register*/
  40         /* Port A */
  41         PCONA = 0x3ff;
  42
  43         /* Port B */
  44         PCONB = 0xff;
  45         PDATB = 0xFFFF;
  46
  47         /* Port C */
  48         /*
  49         PCONC = 0xff55ff15;
  50         PDATC = 0x0;
  51         PUPC = 0xffff;
  52         */
  53
  54         /* Port D */
  55         /*
  56         PCOND = 0xaaaa;
  57         PUPD = 0xff;
  58         */
  59
  60         /* Port E */
  61         PCONE = 0x0001aaa9;
  62         PDATE = 0x0;
  63         PUPE = 0xff;
  64
  65         /* Port F */
  66         PCONF = 0x124955;
  67         PDATF  = 0xff; /* B2-eth_reset tied high level */
  68         /*
  69         PUPF = 0x1e3;
  70         */
  71
  72         /* Port G */
  73         PUPG = 0x1;
  74         PCONG = 0x3; /*PG0= EINT0= ETH_INT prepared for linux kernel*/
  75
  76         INTMSK = 0x03fffeff;
  77         INTCON = 0x05;
  78
  79     /*
  80         Configure chip ethernet interrupt as High level
  81         Port G EINT 0-7 EINT0 -> CHIP ETHERNET
  82     */
  83         temp = EXTINT;
  84         temp &= ~0x7;
  85     temp |= 0x1; /*LEVEL_HIGH*/
  86         EXTINT = temp;
  87
  88     /*
  89         Reset SMSC LAN91C96 chip
  90     */
  91     temp= PCONF;
  92     temp |= 0x00000040;
  93     PCONF = temp;
  94
  95         /* Reset high */
  96     temp = PDATF;
  97     temp |= (1 << 3);
  98     PDATF = temp;
  99
 100     /* Short delay */
 101     for (temp=0;temp<10;temp++)
 102     {
 103                 /* NOP */
 104     }
 105
 106     /* Reset low */
 107     temp = PDATF;
 108     temp &= ~(1 << 3);
 109     PDATF = temp;
 110
 111         /* arch number MACH_TYPE_MBA44B0 */
 112         gd->bd->bi_arch_number = MACH_TYPE_S3C44B0;
 113
 114         /* location of boot parameters */
 115         gd->bd->bi_boot_params = 0x0c000100;
 116
 117         return 0;
 118 }
 119
 120 int dram_init (void)
 121 {
 122         DECLARE_GLOBAL_DATA_PTR;
 123
 124         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 125         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 126
 127         return (0);
 128 }