board/dave/PPChameleonEVB/PPChameleonEVB.c

   1 /*
   2  * (C) Copyright 2003
   3  * DAVE Srl
   4  * http://www.dave-tech.it
   5  * http://www.wawnet.biz
   6  * mailto:info@wawnet.biz
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #include <common.h>
  28 #include <asm/processor.h>
  29 #include <command.h>
  30 #include <malloc.h>
  31
  32 /* ------------------------------------------------------------------------- */
  33
  34 /* Prototypes */
  35 int gunzip(void *, int, unsigned char *, unsigned long *);
  36
  37 int board_early_init_f (void)
  38 {
  39         out32(GPIO0_OR, CFG_NAND0_CE);                 /* set initial outputs     */
  40         out32(GPIO0_OR, CFG_NAND1_CE);                 /* set initial outputs     */
  41
  42         /*
  43          * IRQ 0-15  405GP internally generated; active high; level sensitive
  44          * IRQ 16    405GP internally generated; active low; level sensitive
  45          * IRQ 17-24 RESERVED
  46          * IRQ 25 (EXT IRQ 0)
  47          * IRQ 26 (EXT IRQ 1)
  48          * IRQ 27 (EXT IRQ 2)
  49          * IRQ 28 (EXT IRQ 3)
  50          * IRQ 29 (EXT IRQ 4)
  51          * IRQ 30 (EXT IRQ 5)
  52          * IRQ 31 (EXT IRQ 6)
  53          */
  54         mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
  55         mtdcr(uicer, 0x00000000);       /* disable all ints */
  56         mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
  57         mtdcr(uicpr, 0xFFFFFF80);       /* set int polarities */
  58         mtdcr(uictr, 0x10000000);       /* set int trigger levels */
  59         mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
  60         mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
  61
  62         /*
  63          * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
  64          */
  65 #if 1 /* test-only */
  66         mtebc (epcr, 0xa8400000); /* ebc always driven */
  67 #else
  68         mtebc (epcr, 0x28400000); /* ebc in high-z */
  69 #endif
  70         return 0;
  71 }
  72
  73 /* ------------------------------------------------------------------------- */
  74
  75 int misc_init_f (void)
  76 {
  77         return 0;  /* dummy implementation */
  78 }
  79
  80 extern flash_info_t flash_info[];       /* info for FLASH chips */
  81
  82 int misc_init_r (void)
  83 {
  84         DECLARE_GLOBAL_DATA_PTR;
  85
  86         /* adjust flash start and size as well as the offset */
  87         gd->bd->bi_flashstart = 0 - flash_info[0].size;
  88         gd->bd->bi_flashoffset= flash_info[0].size - CFG_MONITOR_LEN;
  89 #if 0
  90         volatile unsigned short *fpga_mode =
  91                 (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
  92         volatile unsigned char *duart0_mcr =
  93                 (unsigned char *)((ulong)DUART0_BA + 4);
  94         volatile unsigned char *duart1_mcr =
  95                 (unsigned char *)((ulong)DUART1_BA + 4);
  96
  97         bd_t *bd = gd->bd;
  98         char *  tmp;                    /* Temporary char pointer      */
  99         unsigned char *dst;
 100         ulong len = sizeof(fpgadata);
 101         int status;
 102         int index;
 103         int i;
 104         unsigned long cntrl0Reg;
 105
 106         dst = malloc(CFG_FPGA_MAX_SIZE);
 107         if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
 108                 printf ("GUNZIP ERROR - must RESET board to recover\n");
 109                 do_reset (NULL, 0, 0, NULL);
 110         }
 111
 112         status = fpga_boot(dst, len);
 113         if (status != 0) {
 114                 printf("\nFPGA: Booting failed ");
 115                 switch (status) {
 116                 case ERROR_FPGA_PRG_INIT_LOW:
 117                         printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
 118                         break;
 119                 case ERROR_FPGA_PRG_INIT_HIGH:
 120                         printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
 121                         break;
 122                 case ERROR_FPGA_PRG_DONE:
 123                         printf("(Timeout: DONE not high after programming FPGA)\n ");
 124                         break;
 125                 }
 126
 127                 /* display infos on fpgaimage */
 128                 index = 15;
 129                 for (i=0; i<4; i++) {
 130                         len = dst[index];
 131                         printf("FPGA: %s\n", &(dst[index+1]));
 132                         index += len+3;
 133                 }
 134                 putc ('\n');
 135                 /* delayed reboot */
 136                 for (i=20; i>0; i--) {
 137                         printf("Rebooting in %2d seconds \r",i);
 138                         for (index=0;index<1000;index++)
 139                                 udelay(1000);
 140                 }
 141                 putc ('\n');
 142                 do_reset(NULL, 0, 0, NULL);
 143         }
 144
 145         puts("FPGA:  ");
 146
 147         /* display infos on fpgaimage */
 148         index = 15;
 149         for (i=0; i<4; i++) {
 150                 len = dst[index];
 151                 printf("%s ", &(dst[index+1]));
 152                 index += len+3;
 153         }
 154         putc ('\n');
 155
 156         free(dst);
 157
 158         /*
 159          * Reset FPGA via FPGA_DATA pin
 160          */
 161         SET_FPGA(FPGA_PRG | FPGA_CLK);
 162         udelay(1000); /* wait 1ms */
 163         SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
 164         udelay(1000); /* wait 1ms */
 165 #endif
 166
 167 #if 0
 168         /*
 169          * Enable power on PS/2 interface
 170          */
 171         *fpga_mode |= CFG_FPGA_CTRL_PS2_RESET;
 172
 173         /*
 174          * Enable interrupts in exar duart mcr[3]
 175          */
 176         *duart0_mcr = 0x08;
 177         *duart1_mcr = 0x08;
 178 #endif
 179         return (0);
 180 }
 181
 182 /*
 183  * Check Board Identity:
 184  */
 185
 186 int checkboard (void)
 187 {
 188         char str[64];
 189         int i = getenv_r ("serial#", str, sizeof(str));
 190
 191         puts ("Board: ");
 192
 193         if (i == -1) {
 194                 puts ("### No HW ID - assuming PPChameleonEVB");
 195         } else {
 196                 puts(str);
 197         }
 198
 199         putc ('\n');
 200
 201         return 0;
 202 }
 203
 204 /* ------------------------------------------------------------------------- */
 205
 206 long int initdram (int board_type)
 207 {
 208         unsigned long val;
 209
 210         mtdcr(memcfga, mem_mb0cf);
 211         val = mfdcr(memcfgd);
 212
 213 #if 0 /* test-only */
 214         for (;;) {
 215                 NAND_DISABLE_CE(1);
 216                 udelay(100);
 217                 NAND_ENABLE_CE(1);
 218                 udelay(100);
 219         }
 220 #endif
 221 #if 0
 222         printf("\nmb0cf=%x\n", val); /* test-only */
 223         printf("strap=%x\n", mfdcr(strap)); /* test-only */
 224 #endif
 225
 226         return (4*1024*1024 << ((val & 0x000e0000) >> 17));
 227 }
 228
 229 /* ------------------------------------------------------------------------- */
 230
 231 int testdram (void)
 232 {
 233         /* TODO: XXX XXX XXX */
 234         printf ("test: 16 MB - ok\n");
 235
 236         return (0);
 237 }
 238
 239 /* ------------------------------------------------------------------------- */
 240
 241 #if (CONFIG_COMMANDS & CFG_CMD_NAND)
 242 extern ulong
 243 nand_probe(ulong physadr);
 244
 245 void
 246 nand_init(void)
 247 {
 248         ulong totlen = 0;
 249
 250 /*
 251         The HI model is equipped with a large block NAND chip not supported yet
 252         by U-Boot
 253     (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_HI)
 254 */
 255
 256 #if (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_ME)
 257         debug ("Probing at 0x%.8x\n", CFG_NAND0_BASE);
 258         totlen += nand_probe (CFG_NAND0_BASE);
 259 #endif  /* CONFIG_PPCHAMELEON_MODULE_ME, CONFIG_PPCHAMELEON_MODULE_HI */
 260
 261         debug ("Probing at 0x%.8x\n", CFG_NAND1_BASE);
 262         totlen += nand_probe (CFG_NAND1_BASE);
 263
 264         printf ("%3lu MB\n", totlen >>20);
 265 }
 266 #endif
 267
 268 #ifdef CONFIG_CFB_CONSOLE
 269 # ifdef CONFIG_CONSOLE_EXTRA_INFO
 270 # include <video_fb.h>
 271 extern GraphicDevice smi;
 272
 273 void video_get_info_str (int line_number, char *info)
 274 {
 275         uint pvr = get_pvr ();
 276
 277         /* init video info strings for graphic console */
 278         switch (line_number) {
 279         case 1:
 280                 switch (pvr) {
 281                 case PVR_405EP_RB:
 282                         sprintf (info, " AMCC PowerPC 405EP Rev. B");
 283                         break;
 284                 default:
 285                         sprintf (info, " AMCC PowerPC 405EP Rev. <unknown>");
 286                         break;
 287                 }
 288                 return;
 289         case 2:
 290                 sprintf (info, " DAVE Srl PPChameleonEVB - www.dave-tech.it");
 291                 return;
 292         case 3:
 293                 sprintf (info, " %s", smi.modeIdent);
 294                 return;
 295         }
 296
 297         /* no more info lines */
 298         *info = 0;
 299         return;
 300 }
 301 # endif /* CONFIG_CONSOLE_EXTRA_INFO */
 302 #endif  /* CONFIG_CFB_CONSOLE */