2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 * Based on da830evm.c. Original Copyrights follow:
6 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
7 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
9 * SPDX-License-Identifier: GPL-2.0+
17 #include <spi_flash.h>
18 #include <asm/arch/hardware.h>
19 #include <asm/ti-common/davinci_nand.h>
20 #include <asm/arch/emac_defs.h>
21 #include <asm/arch/pinmux_defs.h>
23 #include <asm/arch/davinci_misc.h>
24 #include <linux/errno.h>
26 #include <asm/mach-types.h>
28 #ifdef CONFIG_MMC_DAVINCI
30 #include <asm/arch/sdmmc_defs.h>
33 DECLARE_GLOBAL_DATA_PTR
;
35 #ifdef CONFIG_DRIVER_TI_EMAC
36 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
41 #endif /* CONFIG_DRIVER_TI_EMAC */
43 #define CFG_MAC_ADDR_SPI_BUS 0
44 #define CFG_MAC_ADDR_SPI_CS 0
45 #define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
46 #define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3
48 #define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K)
50 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
51 static int get_mac_addr(u8
*addr
)
53 struct spi_flash
*flash
;
56 flash
= spi_flash_probe(CFG_MAC_ADDR_SPI_BUS
, CFG_MAC_ADDR_SPI_CS
,
57 CFG_MAC_ADDR_SPI_MAX_HZ
, CFG_MAC_ADDR_SPI_MODE
);
59 printf("Error - unable to probe SPI flash.\n");
63 ret
= spi_flash_read(flash
, (CFG_MAC_ADDR_OFFSET
) + 1, 7, addr
);
65 printf("Error - unable to read MAC address from SPI flash.\n");
73 void dsp_lpsc_on(unsigned domain
, unsigned int id
)
75 dv_reg_p mdstat
, mdctl
, ptstat
, ptcmd
;
76 struct davinci_psc_regs
*psc_regs
;
78 psc_regs
= davinci_psc0_regs
;
79 mdstat
= &psc_regs
->psc0
.mdstat
[id
];
80 mdctl
= &psc_regs
->psc0
.mdctl
[id
];
81 ptstat
= &psc_regs
->ptstat
;
82 ptcmd
= &psc_regs
->ptcmd
;
84 while (*ptstat
& (0x1 << domain
))
87 if ((*mdstat
& 0x1f) == 0x03)
88 return; /* Already on and enabled */
92 *ptcmd
= 0x1 << domain
;
94 while (*ptstat
& (0x1 << domain
))
96 while ((*mdstat
& 0x1f) != 0x03)
97 ; /* Probably an overkill... */
100 static void dspwake(void)
102 unsigned *resetvect
= (unsigned *)DAVINCI_L3CBARAM_BASE
;
105 /* if the device is ARM only, return */
106 if ((readl(CHIP_REV_ID_REG
) & 0x3f) == 0x10)
109 if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL
))
112 *resetvect
++ = 0x1E000; /* DSP Idle */
113 /* clear out the next 10 words as NOP */
114 memset(resetvect
, 0, sizeof(unsigned) *10);
116 /* setup the DSP reset vector */
117 writel(DAVINCI_L3CBARAM_BASE
, HOST1CFG
);
119 dsp_lpsc_on(1, DAVINCI_LPSC_GEM
);
120 val
= readl(PSC0_MDCTL
+ (15 * 4));
122 writel(val
, (PSC0_MDCTL
+ (15 * 4)));
125 int misc_init_r(void)
129 #if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM)
131 uchar env_enetaddr
[6];
134 enetaddr_found
= eth_env_get_enetaddr("ethaddr", env_enetaddr
);
138 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
142 spi_mac_read
= get_mac_addr(buff
);
146 * MAC address not present in the environment
147 * try and read the MAC address from SPI flash
150 if (!enetaddr_found
) {
152 if (is_valid_ethaddr(buff
)) {
153 if (eth_env_set_enetaddr("ethaddr", buff
)) {
154 printf("Warning: Failed to "
155 "set MAC address from SPI flash\n");
158 printf("Warning: Invalid "
159 "MAC address read from SPI flash\n");
164 * MAC address present in environment compare it with
165 * the MAC address in SPI flash and warn on mismatch
167 if (!spi_mac_read
&& is_valid_ethaddr(buff
) &&
168 memcmp(env_enetaddr
, buff
, 6))
169 printf("Warning: MAC address in SPI flash don't match "
170 "with the MAC address in the environment\n");
171 printf("Default using MAC address from environment\n");
174 #elif defined(CONFIG_MAC_ADDR_IN_EEPROM)
178 /* Read Ethernet MAC address from EEPROM */
179 eeprom_mac_read
= dvevm_read_mac_address(enetaddr
);
182 * MAC address not present in the environment
183 * try and read the MAC address from EEPROM flash
186 if (!enetaddr_found
) {
188 /* Set Ethernet MAC address from EEPROM */
189 davinci_sync_env_enetaddr(enetaddr
);
192 * MAC address present in environment compare it with
193 * the MAC address in EEPROM and warn on mismatch
195 if (eeprom_mac_read
&& memcmp(enetaddr
, env_enetaddr
, 6))
196 printf("Warning: MAC address in EEPROM don't match "
197 "with the MAC address in the environment\n");
198 printf("Default using MAC address from environment\n");
205 #ifdef CONFIG_MMC_DAVINCI
206 static struct davinci_mmc mmc_sd0
= {
207 .reg_base
= (struct davinci_mmc_regs
*)DAVINCI_MMC_SD0_BASE
,
208 .host_caps
= MMC_MODE_4BIT
, /* DA850 supports only 4-bit SD/MMC */
209 .voltages
= MMC_VDD_32_33
| MMC_VDD_33_34
,
210 .version
= MMC_CTLR_VERSION_2
,
213 int board_mmc_init(bd_t
*bis
)
215 mmc_sd0
.input_clk
= clk_get(DAVINCI_MMCSD_CLKID
);
217 /* Add slot-0 to mmc subsystem */
218 return davinci_mmc_init(bis
, &mmc_sd0
);
222 static const struct pinmux_config gpio_pins
[] = {
223 #ifdef CONFIG_USE_NOR
224 /* GP0[11] is required for NOR to work on Rev 3 EVMs */
225 { pinmux(0), 8, 4 }, /* GP0[11] */
227 #ifdef CONFIG_MMC_DAVINCI
228 /* GP0[11] is required for SD to work on Rev 3 EVMs */
229 { pinmux(0), 8, 4 }, /* GP0[11] */
233 const struct pinmux_resource pinmuxes
[] = {
234 #ifdef CONFIG_DRIVER_TI_EMAC
235 PINMUX_ITEM(emac_pins_mdio
),
236 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
237 PINMUX_ITEM(emac_pins_rmii
),
239 PINMUX_ITEM(emac_pins_mii
),
242 #ifdef CONFIG_SPI_FLASH
243 PINMUX_ITEM(spi1_pins_base
),
244 PINMUX_ITEM(spi1_pins_scs0
),
246 PINMUX_ITEM(uart2_pins_txrx
),
247 PINMUX_ITEM(uart2_pins_rtscts
),
248 PINMUX_ITEM(i2c0_pins
),
249 #ifdef CONFIG_NAND_DAVINCI
250 PINMUX_ITEM(emifa_pins_cs3
),
251 PINMUX_ITEM(emifa_pins_cs4
),
252 PINMUX_ITEM(emifa_pins_nand
),
253 #elif defined(CONFIG_USE_NOR)
254 PINMUX_ITEM(emifa_pins_cs2
),
255 PINMUX_ITEM(emifa_pins_nor
),
257 PINMUX_ITEM(gpio_pins
),
258 #ifdef CONFIG_MMC_DAVINCI
259 PINMUX_ITEM(mmc0_pins
),
263 const int pinmuxes_size
= ARRAY_SIZE(pinmuxes
);
265 const struct lpsc_resource lpsc
[] = {
266 { DAVINCI_LPSC_AEMIF
}, /* NAND, NOR */
267 { DAVINCI_LPSC_SPI1
}, /* Serial Flash */
268 { DAVINCI_LPSC_EMAC
}, /* image download */
269 { DAVINCI_LPSC_UART2
}, /* console */
270 { DAVINCI_LPSC_GPIO
},
271 #ifdef CONFIG_MMC_DAVINCI
272 { DAVINCI_LPSC_MMC_SD
},
276 const int lpsc_size
= ARRAY_SIZE(lpsc
);
278 #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
279 #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000
282 #define REV_AM18X_EVM 0x100
285 * get_board_rev() - setup to pass kernel board revision information
287 * bit[0-3] Maximum cpu clock rate supported by onboard SoC
293 u32
get_board_rev(void)
296 u32 maxcpuclk
= CONFIG_DA850_EVM_MAX_CPU_CLK
;
299 s
= env_get("maxcpuclk");
301 maxcpuclk
= simple_strtoul(s
, NULL
, 10);
303 if (maxcpuclk
>= 456000000)
305 else if (maxcpuclk
>= 408000000)
307 else if (maxcpuclk
>= 372000000)
309 #ifdef CONFIG_DA850_AM18X_EVM
310 rev
|= REV_AM18X_EVM
;
315 int board_early_init_f(void)
318 * Power on required peripherals
319 * ARM does not have access by default to PSC0 and PSC1
320 * assuming here that the DSP bootloader has set the IOPU
321 * such that PSC access is available to ARM
323 if (da8xx_configure_lpsc_items(lpsc
, ARRAY_SIZE(lpsc
)))
333 #ifdef CONFIG_NAND_DAVINCI
335 * NAND CS setup - cycle counts based on da850evm NAND timings in the
336 * Linux kernel @ 25MHz EMIFA
338 writel((DAVINCI_ABCR_WSETUP(2) |
339 DAVINCI_ABCR_WSTROBE(2) |
340 DAVINCI_ABCR_WHOLD(1) |
341 DAVINCI_ABCR_RSETUP(1) |
342 DAVINCI_ABCR_RSTROBE(4) |
343 DAVINCI_ABCR_RHOLD(0) |
345 DAVINCI_ABCR_ASIZE_8BIT
),
346 &davinci_emif_regs
->ab2cr
); /* CS3 */
349 /* arch number of the board */
350 gd
->bd
->bi_arch_number
= MACH_TYPE_DAVINCI_DA850_EVM
;
352 /* address of boot parameters */
353 gd
->bd
->bi_boot_params
= LINUX_BOOT_PARAM_ADDR
;
355 /* setup the SUSPSRC for ARM to control emulation suspend */
356 writel(readl(&davinci_syscfg_regs
->suspsrc
) &
357 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC
| DAVINCI_SYSCFG_SUSPSRC_I2C
|
358 DAVINCI_SYSCFG_SUSPSRC_SPI1
| DAVINCI_SYSCFG_SUSPSRC_TIMER0
|
359 DAVINCI_SYSCFG_SUSPSRC_UART2
),
360 &davinci_syscfg_regs
->suspsrc
);
362 /* configure pinmux settings */
363 if (davinci_configure_pin_mux_items(pinmuxes
, ARRAY_SIZE(pinmuxes
)))
366 #ifdef CONFIG_USE_NOR
367 /* Set the GPIO direction as output */
368 clrbits_le32((u32
*)GPIO_BANK0_REG_DIR_ADDR
, (0x01 << 11));
370 /* Set the output as low */
371 writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR
);
374 #ifdef CONFIG_MMC_DAVINCI
375 /* Set the GPIO direction as output */
376 clrbits_le32((u32
*)GPIO_BANK0_REG_DIR_ADDR
, (0x01 << 11));
378 /* Set the output as high */
379 writel(0x01 << 11, GPIO_BANK0_REG_SET_ADDR
);
382 #ifdef CONFIG_DRIVER_TI_EMAC
383 davinci_emac_mii_mode_sel(HAS_RMII
);
384 #endif /* CONFIG_DRIVER_TI_EMAC */
386 /* enable the console UART */
387 writel((DAVINCI_UART_PWREMU_MGMT_FREE
| DAVINCI_UART_PWREMU_MGMT_URRST
|
388 DAVINCI_UART_PWREMU_MGMT_UTRST
),
389 &davinci_uart2_ctrl_regs
->pwremu_mgmt
);
394 #ifdef CONFIG_DRIVER_TI_EMAC
396 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
400 * DA850/OMAP-L138 EVM can interface to a daughter card for
401 * additional features. This card has an I2C GPIO Expander TCA6416
402 * to select the required functions like camera, RMII Ethernet,
403 * character LCD, video.
405 * Initialization of the expander involves configuring the
406 * polarity and direction of the ports. P07-P05 are used here.
407 * These ports are connected to a Mux chip which enables only one
408 * functionality at a time.
410 * For RMII phy to respond, the MII MDIO clock has to be disabled
411 * since both the PHY devices have address as zero. The MII MDIO
412 * clock is controlled via GPIO2[6].
414 * This code is valid for Beta version of the hardware
416 int rmii_hw_init(void)
418 const struct pinmux_config gpio_pins
[] = {
425 /* PinMux for GPIO */
426 if (davinci_configure_pin_mux(gpio_pins
, ARRAY_SIZE(gpio_pins
)) != 0)
429 /* I2C Exapnder configuration */
430 /* Set polarity to non-inverted */
433 ret
= i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR
, 4, 1, buf
, 2);
435 printf("\nExpander @ 0x%02x write FAILED!!!\n",
436 CONFIG_SYS_I2C_EXPANDER_ADDR
);
440 /* Configure P07-P05 as outputs */
443 ret
= i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR
, 6, 1, buf
, 2);
445 printf("\nExpander @ 0x%02x write FAILED!!!\n",
446 CONFIG_SYS_I2C_EXPANDER_ADDR
);
449 /* For Ethernet RMII selection
454 if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR
, 2, 1, buf
, 1)) {
455 printf("\nExpander @ 0x%02x read FAILED!!!\n",
456 CONFIG_SYS_I2C_EXPANDER_ADDR
);
460 buf
[0] |= (0 << 7) | (1 << 6) | (1 << 5);
461 if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR
, 2, 1, buf
, 1)) {
462 printf("\nExpander @ 0x%02x write FAILED!!!\n",
463 CONFIG_SYS_I2C_EXPANDER_ADDR
);
466 /* Set the output as high */
467 temp
= REG(GPIO_BANK2_REG_SET_ADDR
);
469 REG(GPIO_BANK2_REG_SET_ADDR
) = temp
;
471 /* Set the GPIO direction as output */
472 temp
= REG(GPIO_BANK2_REG_DIR_ADDR
);
473 temp
&= ~(0x01 << 6);
474 REG(GPIO_BANK2_REG_DIR_ADDR
) = temp
;
478 #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
481 * Initializes on-board ethernet controllers.
483 int board_eth_init(bd_t
*bis
)
485 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
486 /* Select RMII fucntion through the expander */
488 printf("RMII hardware init failed!!!\n");
490 if (!davinci_emac_initialize()) {
491 printf("Error: Ethernet init failed!\n");
497 #endif /* CONFIG_DRIVER_TI_EMAC */