board/davinci/dm355evm/dm355evm.c

   1 /*
   2  * Copyright (C) 2009 David Brownell
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <nand.h>
   9 #include <asm/io.h>
  10 #include <asm/arch/hardware.h>
  11 #include <asm/arch/emif_defs.h>
  12 #include <asm/arch/nand_defs.h>
  13 #include <asm/arch/davinci_misc.h>
  14 #include <net.h>
  15 #include <netdev.h>
  16 #ifdef CONFIG_DAVINCI_MMC
  17 #include <mmc.h>
  18 #include <asm/arch/sdmmc_defs.h>
  19 #endif
  20
  21 DECLARE_GLOBAL_DATA_PTR;
  22
  23 /*
  24  * With the DM355 EVM, u-boot is *always* a third stage loader,
  25  * unless a JTAG debugger handles the first two stages:
  26  *
  27  *   - 1st stage is ROM Boot Loader (RBL), which searches for a
  28  *     second stage loader in one of three places based on SW7:
  29  *     NAND (with MMC/SD fallback), MMC/SD, or UART.
  30  *
  31  *   - 2nd stage is User Boot Loader (UBL), using at most 30KB
  32  *     of on-chip SRAM, responsible for lowlevel init, and for
  33  *     loading the third stage loader into DRAM.
  34  *
  35  *   - 3rd stage, that's us!
  36  */
  37
  38 int board_init(void)
  39 {
  40         gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM355_EVM;
  41         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
  42
  43         /* We expect the UBL to have handled "lowlevel init", which
  44          * involves setting up at least:
  45          *  - clocks
  46          *      + PLL1 (for ARM and peripherals) and PLL2 (for DDR)
  47          *      + clock divisors for those PLLs
  48          *      + LPSC_DDR module enabled
  49          *      + LPSC_TIMER0 module (still) enabled
  50          *  - EMIF
  51          *      + DDR init and timings
  52          *      + AEMIF timings (for NAND and DM9000)
  53          *  - pinmux
  54          *
  55          * Some of that is repeated here, mostly as a precaution.
  56          */
  57
  58         /* AEMIF:  Some "address" lines are available as GPIOs.  A3..A13
  59          * could be too if we used A12 as a GPIO during NAND chipselect
  60          * (and Linux did too), letting us control the LED on A7/GPIO61.
  61          */
  62         REG(PINMUX2) = 0x0c08;
  63
  64         /* UART0 may still be in SyncReset if we didn't boot from UART */
  65         davinci_enable_uart0();
  66
  67         /* EDMA may be in SyncReset too; turn it on, Linux won't (yet) */
  68         lpsc_on(DAVINCI_LPSC_TPCC);
  69         lpsc_on(DAVINCI_LPSC_TPTC0);
  70         lpsc_on(DAVINCI_LPSC_TPTC1);
  71
  72         return 0;
  73 }
  74
  75 #ifdef CONFIG_DRIVER_DM9000
  76 int board_eth_init(bd_t *bis)
  77 {
  78         return dm9000_initialize(bis);
  79 }
  80 #endif
  81
  82 #ifdef CONFIG_NAND_DAVINCI
  83
  84 static void nand_dm355evm_select_chip(struct mtd_info *mtd, int chip)
  85 {
  86         struct nand_chip        *this = mtd->priv;
  87         unsigned long           wbase = (unsigned long) this->IO_ADDR_W;
  88         unsigned long           rbase = (unsigned long) this->IO_ADDR_R;
  89
  90         if (chip == 1) {
  91                 __set_bit(14, &wbase);
  92                 __set_bit(14, &rbase);
  93         } else {
  94                 __clear_bit(14, &wbase);
  95                 __clear_bit(14, &rbase);
  96         }
  97         this->IO_ADDR_W = (void *)wbase;
  98         this->IO_ADDR_R = (void *)rbase;
  99 }
 100
 101 int board_nand_init(struct nand_chip *nand)
 102 {
 103         davinci_nand_init(nand);
 104         nand->select_chip = nand_dm355evm_select_chip;
 105         return 0;
 106 }
 107
 108 #endif
 109
 110 #ifdef CONFIG_DAVINCI_MMC
 111 static struct davinci_mmc mmc_sd0 = {
 112         .reg_base       = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
 113         .input_clk      = 108000000,
 114         .host_caps      = MMC_MODE_4BIT,
 115         .voltages       = MMC_VDD_32_33 | MMC_VDD_33_34,
 116         .version        = MMC_CTLR_VERSION_1,
 117 };
 118
 119 #ifdef CONFIG_DAVINCI_MMC_SD1
 120 static struct davinci_mmc mmc_sd1 = {
 121         .reg_base       = (struct davinci_mmc_regs *)DAVINCI_MMC_SD1_BASE,
 122         .input_clk      = 108000000,
 123         .host_caps      = MMC_MODE_4BIT,
 124         .voltages       = MMC_VDD_32_33 | MMC_VDD_33_34,
 125         .version        = MMC_CTLR_VERSION_1,
 126 };
 127 #endif
 128
 129 int board_mmc_init(bd_t *bis)
 130 {
 131         int err;
 132
 133         /* Add slot-0 to mmc subsystem */
 134         err = davinci_mmc_init(bis, &mmc_sd0);
 135         if (err)
 136                 return err;
 137
 138 #ifdef CONFIG_DAVINCI_MMC_SD1
 139         /* Add slot-1 to mmc subsystem */
 140         err = davinci_mmc_init(bis, &mmc_sd1);
 141 #endif
 142
 143         return err;
 144 }
 145 #endif