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1 /*
2 * Copyright (C) 2008 Atmel Corporation
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6 #include <common.h>
7 #include <netdev.h>
8
9 #include <asm/io.h>
10 #include <asm/sdram.h>
11 #include <asm/arch/clk.h>
12 #include <asm/arch/hmatrix.h>
13 #include <asm/arch/mmu.h>
14 #include <asm/arch/portmux.h>
15
16 DECLARE_GLOBAL_DATA_PTR;
17
18 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
19 {
20 .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
21 .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
22 .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
23 | MMU_VMR_CACHE_NONE,
24 }, {
25 .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
26 .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT,
27 .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
28 | MMU_VMR_CACHE_WRBACK,
29 },
30 };
31
32 static const struct sdram_config sdram_config = {
33 /* MT48LC4M32B2P-6 (16 MB) */
34 .data_bits = SDRAM_DATA_32BIT,
35 .row_bits = 12,
36 .col_bits = 8,
37 .bank_bits = 2,
38 .cas = 3,
39 .twr = 2,
40 .trc = 7,
41 .trp = 2,
42 .trcd = 2,
43 .tras = 5,
44 .txsr = 5,
45 /* 15.6 us */
46 .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
47 };
48
49 int board_early_init_f(void)
50 {
51 /* Enable SDRAM in the EBI mux */
52 hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
53
54 portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH);
55 portmux_enable_usart3(PORTMUX_DRIVE_MIN);
56 #if defined(CONFIG_MACB)
57 portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
58 #endif
59 #if defined(CONFIG_MMC)
60 portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
61 #endif
62
63 return 0;
64 }
65
66 phys_size_t initdram(int board_type)
67 {
68 unsigned long expected_size;
69 unsigned long actual_size;
70 void *sdram_base;
71
72 sdram_base = uncached(EBI_SDRAM_BASE);
73
74 expected_size = sdram_init(sdram_base, &sdram_config);
75 actual_size = get_ram_size(sdram_base, expected_size);
76
77 if (expected_size != actual_size)
78 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
79 actual_size >> 20, expected_size >> 20);
80
81 return actual_size;
82 }
83
84 int board_early_init_r(void)
85 {
86 gd->bd->bi_phy_id[0] = 0x01;
87 return 0;
88 }
89
90 #if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET)
91 int board_eth_init(bd_t *bi)
92 {
93 return macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0,
94 bi->bi_phy_id[0]);
95 }
96 #endif