board/emk/top9000/top9000.c

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian@popies.net>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  *
   6  * (C) Copyright 2010
   7  * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
   8  *
   9  * SPDX-License-Identifier:     GPL-2.0+
  10  */
  11
  12 #include <common.h>
  13 #include <net.h>
  14 #include <netdev.h>
  15 #include <mmc.h>
  16 #include <atmel_mci.h>
  17 #include <i2c.h>
  18 #include <spi.h>
  19 #include <asm/io.h>
  20 #include <asm/arch/hardware.h>
  21 #include <asm/arch/at91sam9260_matrix.h>
  22 #include <asm/arch/at91sam9_smc.h>
  23 #include <asm/arch/at91_common.h>
  24 #include <asm/arch/at91_pmc.h>
  25 #include <asm/arch/at91_rstc.h>
  26 #include <asm/arch/at91_shdwn.h>
  27 #include <asm/arch/gpio.h>
  28
  29 DECLARE_GLOBAL_DATA_PTR;
  30
  31 #ifdef CONFIG_CMD_NAND
  32 static void nand_hw_init(void)
  33 {
  34         struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
  35         struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  36         unsigned long csa;
  37
  38         /* Assign CS3 to NAND/SmartMedia Interface */
  39         csa = readl(&matrix->ebicsa);
  40         csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
  41         writel(csa, &matrix->ebicsa);
  42
  43         /* Configure SMC CS3 for NAND/SmartMedia */
  44         writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
  45                 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
  46                 &smc->cs[3].setup);
  47         writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
  48                 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
  49                 &smc->cs[3].pulse);
  50         writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
  51                 &smc->cs[3].cycle);
  52         writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  53                 AT91_SMC_MODE_EXNW_DISABLE |
  54                 AT91_SMC_MODE_DBW_8 |
  55                 AT91_SMC_MODE_TDF_CYCLE(2),
  56                 &smc->cs[3].mode);
  57
  58         /* Configure RDY/BSY */
  59         at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  60
  61         /* Enable NandFlash */
  62         at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  63 }
  64 #endif
  65
  66 #ifdef CONFIG_MACB
  67 static void macb_hw_init(void)
  68 {
  69         struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  70
  71         /* Enable EMAC clock */
  72         writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
  73
  74         /* Initialize EMAC=MACB hardware */
  75         at91_macb_hw_init();
  76 }
  77 #endif
  78
  79 #ifdef CONFIG_GENERIC_ATMEL_MCI
  80 /* this is a weak define that we are overriding */
  81 int board_mmc_init(bd_t *bd)
  82 {
  83         struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  84
  85         /* Enable MCI clock */
  86         writel(1 << ATMEL_ID_MCI, &pmc->pcer);
  87
  88         /* Initialize MCI hardware */
  89         at91_mci_hw_init();
  90
  91         /* This calls the atmel_mmc_init in gen_atmel_mci.c */
  92         return atmel_mci_init((void *)ATMEL_BASE_MCI);
  93 }
  94
  95 /* this is a weak define that we are overriding */
  96 int board_mmc_getcd(struct mmc *mmc)
  97 {
  98         return !at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN);
  99 }
 100
 101 #endif
 102
 103 int board_early_init_f(void)
 104 {
 105         struct at91_shdwn *shdwn = (struct at91_shdwn *)ATMEL_BASE_SHDWN;
 106         struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 107
 108         /*
 109          * make sure the board can be powered on by
 110          * any transition on WKUP
 111          */
 112         writel(AT91_SHDW_MR_WKMODE0H2L | AT91_SHDW_MR_WKMODE0L2H,
 113                 &shdwn->mr);
 114
 115         /* Enable clocks for all PIOs */
 116         writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
 117                 (1 << ATMEL_ID_PIOC),
 118                 &pmc->pcer);
 119
 120         /* set SCL0 and SDA0 to open drain */
 121         at91_set_pio_output(I2C0_PORT, SCL0_PIN, 1);
 122         at91_set_pio_multi_drive(I2C0_PORT, SCL0_PIN, 1);
 123         at91_set_pio_pullup(I2C0_PORT, SCL0_PIN, 1);
 124         at91_set_pio_output(I2C0_PORT, SDA0_PIN, 1);
 125         at91_set_pio_multi_drive(I2C0_PORT, SDA0_PIN, 1);
 126         at91_set_pio_pullup(I2C0_PORT, SDA0_PIN, 1);
 127
 128         /* set SCL1 and SDA1 to open drain */
 129         at91_set_pio_output(I2C1_PORT, SCL1_PIN, 1);
 130         at91_set_pio_multi_drive(I2C1_PORT, SCL1_PIN, 1);
 131         at91_set_pio_pullup(I2C1_PORT, SCL1_PIN, 1);
 132         at91_set_pio_output(I2C1_PORT, SDA1_PIN, 1);
 133         at91_set_pio_multi_drive(I2C1_PORT, SDA1_PIN, 1);
 134         at91_set_pio_pullup(I2C1_PORT, SDA1_PIN, 1);
 135         return 0;
 136 }
 137
 138 int board_init(void)
 139 {
 140         /* arch number of TOP9000 Board */
 141         gd->bd->bi_arch_number = MACH_TYPE_TOP9000;
 142         /* adress of boot parameters */
 143         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 144
 145         at91_seriald_hw_init();
 146 #ifdef CONFIG_CMD_NAND
 147         nand_hw_init();
 148 #endif
 149 #ifdef CONFIG_MACB
 150         macb_hw_init();
 151 #endif
 152 #ifdef CONFIG_ATMEL_SPI0
 153         /* (n+4) denotes to use nSPISEL(0) in GPIO mode! */
 154         at91_spi0_hw_init(1 << (FRAM_CS_NUM + 4));
 155 #endif
 156 #ifdef CONFIG_ATMEL_SPI1
 157         at91_spi1_hw_init(1 << (ENC_CS_NUM + 4));
 158 #endif
 159         return 0;
 160 }
 161
 162 #ifdef CONFIG_MISC_INIT_R
 163 int misc_init_r(void)
 164 {
 165         /* read 'factory' part of EEPROM */
 166         read_factory_r();
 167         return 0;
 168 }
 169 #endif
 170
 171 int dram_init(void)
 172 {
 173         gd->ram_size = get_ram_size(
 174                 (void *)CONFIG_SYS_SDRAM_BASE,
 175                 CONFIG_SYS_SDRAM_SIZE);
 176         return 0;
 177 }
 178
 179 #ifdef CONFIG_RESET_PHY_R
 180 void reset_phy(void)
 181 {
 182         /*
 183          * Initialize ethernet HW addresses prior to starting Linux,
 184          * needed for nfsroot.
 185          * TODO: We need to investigate if that is really necessary.
 186          */
 187         eth_init(gd->bd);
 188 }
 189 #endif
 190
 191 int board_eth_init(bd_t *bis)
 192 {
 193         int rc = 0;
 194         int num = 0;
 195 #ifdef CONFIG_MACB
 196         rc = macb_eth_initialize(0,
 197                 (void *)ATMEL_BASE_EMAC0,
 198                 CONFIG_SYS_PHY_ID);
 199         if (!rc)
 200                 num++;
 201 #endif
 202 #ifdef CONFIG_ENC28J60
 203         rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM,
 204                 ENC_SPI_CLOCK, SPI_MODE_0);
 205         if (!rc)
 206                 num++;
 207 # ifdef CONFIG_ENC28J60_2
 208         rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+1,
 209                 ENC_SPI_CLOCK, SPI_MODE_0);
 210         if (!rc)
 211                 num++;
 212 #  ifdef CONFIG_ENC28J60_3
 213         rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+2,
 214                 ENC_SPI_CLOCK, SPI_MODE_0);
 215         if (!rc)
 216                 num++;
 217 #  endif
 218 # endif
 219 #endif
 220         return num;
 221 }
 222
 223 /*
 224  * I2C access functions
 225  *
 226  * Note:
 227  * We need to access Bus 0 before relocation to access the
 228  * environment settings.
 229  * However i2c_get_bus_num() cannot be called before
 230  * relocation.
 231  */
 232 #ifdef CONFIG_SOFT_I2C
 233 void iic_init(void)
 234 {
 235         /* ports are now initialized in board_early_init_f() */
 236 }
 237
 238 int iic_read(void)
 239 {
 240         switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
 241         case 0:
 242                 return at91_get_pio_value(I2C0_PORT, SDA0_PIN);
 243         case 1:
 244                 return at91_get_pio_value(I2C1_PORT, SDA1_PIN);
 245         }
 246         return 1;
 247 }
 248
 249 void iic_sda(int bit)
 250 {
 251         switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
 252         case 0:
 253                 at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit);
 254                 break;
 255         case 1:
 256                 at91_set_pio_value(I2C1_PORT, SDA1_PIN, bit);
 257                 break;
 258         }
 259 }
 260
 261 void iic_scl(int bit)
 262 {
 263         switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
 264         case 0:
 265                 at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit);
 266                 break;
 267         case 1:
 268                 at91_set_pio_value(I2C1_PORT, SCL1_PIN, bit);
 269                 break;
 270         }
 271 }
 272
 273 #endif