board/engicam/icorem6_rqs/icorem6_rqs.c

   1 /*
   2  * Copyright (C) 2016 Amarula Solutions B.V.
   3  * Copyright (C) 2016 Engicam S.r.l.
   4  * Author: Jagan Teki <jagan@amarulasolutions.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #include <common.h>
  10 #include <mmc.h>
  11
  12 #include <asm/io.h>
  13 #include <asm/gpio.h>
  14 #include <linux/sizes.h>
  15
  16 #include <asm/arch/clock.h>
  17 #include <asm/arch/crm_regs.h>
  18 #include <asm/arch/iomux.h>
  19 #include <asm/arch/mx6-pins.h>
  20 #include <asm/arch/sys_proto.h>
  21 #include <asm/imx-common/iomux-v3.h>
  22
  23 DECLARE_GLOBAL_DATA_PTR;
  24
  25 int board_init(void)
  26 {
  27         /* Address of boot parameters */
  28         gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
  29
  30         return 0;
  31 }
  32
  33 #ifdef CONFIG_ENV_IS_IN_MMC
  34 int board_mmc_get_env_dev(int devno)
  35 {
  36         /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */
  37         return (devno == 3) ? 1 : 0;
  38 }
  39
  40 static void mmc_late_init(void)
  41 {
  42         char cmd[32];
  43         char mmcblk[32];
  44         u32 dev_no = mmc_get_env_dev();
  45
  46         setenv_ulong("mmcdev", dev_no);
  47
  48         /* Set mmcblk env */
  49         sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no);
  50         setenv("mmcroot", mmcblk);
  51
  52         sprintf(cmd, "mmc dev %d", dev_no);
  53         run_command(cmd, 0);
  54 }
  55 #endif
  56
  57 int board_late_init(void)
  58 {
  59         switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >>
  60                         IMX6_BMODE_SHIFT) {
  61         case IMX6_BMODE_SD:
  62         case IMX6_BMODE_ESD:
  63         case IMX6_BMODE_MMC:
  64         case IMX6_BMODE_EMMC:
  65 #ifdef CONFIG_ENV_IS_IN_MMC
  66                 mmc_late_init();
  67 #endif
  68                 setenv("modeboot", "mmcboot");
  69                 break;
  70         default:
  71                 setenv("modeboot", "");
  72                 break;
  73         }
  74
  75         if (is_mx6dq())
  76                 setenv("fdt_file", "imx6q-icore-rqs.dtb");
  77         else if(is_mx6dl() || is_mx6solo())
  78                 setenv("fdt_file", "imx6dl-icore-rqs.dtb");
  79
  80         return 0;
  81 }
  82
  83 int dram_init(void)
  84 {
  85         gd->ram_size = imx_ddr_size();
  86
  87         return 0;
  88 }
  89
  90 #ifdef CONFIG_SPL_BUILD
  91 #include <spl.h>
  92
  93 /* MMC board initialization is needed till adding DM support in SPL */
  94 #if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
  95 #include <mmc.h>
  96 #include <fsl_esdhc.h>
  97
  98 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |             \
  99         PAD_CTL_PUS_47K_UP  | PAD_CTL_SPEED_HIGH |               \
 100         PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
 101
 102 static iomux_v3_cfg_t const usdhc3_pads[] = {
 103         IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 104         IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 105         IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 106         IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 107         IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 108         IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 109 };
 110
 111 static iomux_v3_cfg_t const usdhc4_pads[] = {
 112         IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 113         IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 114         IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 115         IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 116         IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 117         IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 118         IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 119         IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 120         IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 121         IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 122 };
 123
 124 struct fsl_esdhc_cfg usdhc_cfg[2] = {
 125         {USDHC3_BASE_ADDR, 1, 4},
 126         {USDHC4_BASE_ADDR, 1, 8},
 127 };
 128
 129 int board_mmc_getcd(struct mmc *mmc)
 130 {
 131         struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
 132         int ret = 0;
 133
 134         switch (cfg->esdhc_base) {
 135         case USDHC3_BASE_ADDR:
 136         case USDHC4_BASE_ADDR:
 137                 ret = 1;
 138                 break;
 139         }
 140
 141         return ret;
 142 }
 143
 144 int board_mmc_init(bd_t *bis)
 145 {
 146         int i, ret;
 147
 148         /*
 149         * According to the board_mmc_init() the following map is done:
 150         * (U-boot device node)    (Physical Port)
 151         * mmc0                  USDHC3
 152         * mmc1                  USDHC4
 153         */
 154         for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
 155                 switch (i) {
 156                 case 0:
 157                         SETUP_IOMUX_PADS(usdhc3_pads);
 158                         usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
 159                         break;
 160                 case 1:
 161                         SETUP_IOMUX_PADS(usdhc4_pads);
 162                         usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
 163                         break;
 164                 default:
 165                         printf("Warning - USDHC%d controller not supporting\n",
 166                                i + 1);
 167                         return 0;
 168                 }
 169
 170                 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
 171                 if (ret) {
 172                         printf("Warning: failed to initialize mmc dev %d\n", i);
 173                         return ret;
 174                 }
 175         }
 176
 177         return 0;
 178 }
 179
 180 #ifdef CONFIG_ENV_IS_IN_MMC
 181 void board_boot_order(u32 *spl_boot_list)
 182 {
 183         u32 bmode = imx6_src_get_boot_mode();
 184         u8 boot_dev = BOOT_DEVICE_MMC1;
 185
 186         switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
 187         case IMX6_BMODE_SD:
 188         case IMX6_BMODE_ESD:
 189                 /* SD/eSD - BOOT_DEVICE_MMC1 */
 190                 break;
 191         case IMX6_BMODE_MMC:
 192         case IMX6_BMODE_EMMC:
 193                 /* MMC/eMMC */
 194                 boot_dev = BOOT_DEVICE_MMC2;
 195                 break;
 196         default:
 197                 /* Default - BOOT_DEVICE_MMC1 */
 198                 printf("Wrong board boot order\n");
 199                 break;
 200         }
 201
 202         spl_boot_list[0] = boot_dev;
 203 }
 204 #endif
 205 #endif
 206
 207 #ifdef CONFIG_SPL_LOAD_FIT
 208 int board_fit_config_name_match(const char *name)
 209 {
 210         if (is_mx6dq() && !strcmp(name, "imx6q-icore-rqs"))
 211                 return 0;
 212         else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore-rqs"))
 213                 return 0;
 214         else
 215                 return -1;
 216 }
 217 #endif
 218 #endif /* CONFIG_SPL_BUILD */