3 * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
5 * SPDX-License-Identifier: GPL-2.0+
10 #if defined(CONFIG_CMD_NAND)
15 * hardware specific access to control-lines
17 static void esd405ep_nand_hwcontrol(struct mtd_info
*mtd
, int cmd
, unsigned int ctrl
)
19 struct nand_chip
*this = mtd
->priv
;
20 if (ctrl
& NAND_CTRL_CHANGE
) {
21 if ( ctrl
& NAND_CLE
)
22 out_be32((void *)GPIO0_OR
, in_be32((void *)GPIO0_OR
) | CONFIG_SYS_NAND_CLE
);
24 out_be32((void *)GPIO0_OR
, in_be32((void *)GPIO0_OR
) & ~CONFIG_SYS_NAND_CLE
);
25 if ( ctrl
& NAND_ALE
)
26 out_be32((void *)GPIO0_OR
, in_be32((void *)GPIO0_OR
) | CONFIG_SYS_NAND_ALE
);
28 out_be32((void *)GPIO0_OR
, in_be32((void *)GPIO0_OR
) & ~CONFIG_SYS_NAND_ALE
);
29 if ( ctrl
& NAND_NCE
)
30 out_be32((void *)GPIO0_OR
, in_be32((void *)GPIO0_OR
) & ~CONFIG_SYS_NAND_CE
);
32 out_be32((void *)GPIO0_OR
, in_be32((void *)GPIO0_OR
) | CONFIG_SYS_NAND_CE
);
35 if (cmd
!= NAND_CMD_NONE
)
36 writeb(cmd
, this->IO_ADDR_W
);
41 * read device ready pin
43 static int esd405ep_nand_device_ready(struct mtd_info
*mtdinfo
)
45 if (in_be32((void *)GPIO0_IR
) & CONFIG_SYS_NAND_RDY
)
51 int board_nand_init(struct nand_chip
*nand
)
54 * Set NAND-FLASH GPIO signals to defaults
56 out_be32((void *)GPIO0_OR
, in_be32((void *)GPIO0_OR
) & ~(CONFIG_SYS_NAND_CLE
| CONFIG_SYS_NAND_ALE
));
57 out_be32((void *)GPIO0_OR
, in_be32((void *)GPIO0_OR
) | CONFIG_SYS_NAND_CE
);
60 * Initialize nand_chip structure
62 nand
->cmd_ctrl
= esd405ep_nand_hwcontrol
;
63 nand
->dev_ready
= esd405ep_nand_device_ready
;
64 nand
->ecc
.mode
= NAND_ECC_SOFT
;
65 nand
->chip_delay
= NAND_BIG_DELAY_US
;
66 nand
->options
= NAND_SAMSUNG_LP_OPTIONS
;