board/esd/vom405/vom405.c

   1 /*
   2  * (C) Copyright 2001-2004
   3  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <asm/processor.h>
  26 #include <command.h>
  27 #include <malloc.h>
  28
  29
  30 extern void lxt971_no_sleep(void);
  31
  32
  33 /* fpga configuration data - not compressed, generated by bin2c */
  34 const unsigned char fpgadata[] =
  35 {
  36 #include "fpgadata.c"
  37 };
  38 int filesize = sizeof(fpgadata);
  39
  40
  41 int board_early_init_f (void)
  42 {
  43         /*
  44          * IRQ 0-15  405GP internally generated; active high; level sensitive
  45          * IRQ 16    405GP internally generated; active low; level sensitive
  46          * IRQ 17-24 RESERVED
  47          * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
  48          * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
  49          * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
  50          * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
  51          * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
  52          * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
  53          * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
  54          */
  55         mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
  56         mtdcr(uicer, 0x00000000);       /* disable all ints */
  57         mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
  58         mtdcr(uicpr, 0xFFFFFF80);       /* set int polarities */
  59         mtdcr(uictr, 0x10000000);       /* set int trigger levels */
  60         mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
  61         mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
  62
  63         /*
  64          * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
  65          */
  66         mtebc (epcr, 0xa8400000); /* ebc always driven */
  67
  68         /*
  69          * Reset CPLD via GPIO12 (CS3) pin
  70          */
  71         out32(GPIO0_OR, in32(GPIO0_OR) & ~(0x80000000 >> 12));
  72         udelay(1000); /* wait 1ms */
  73         out32(GPIO0_OR, in32(GPIO0_OR) | (0x80000000 >> 12));
  74         udelay(1000); /* wait 1ms */
  75
  76         return 0;
  77 }
  78
  79
  80 /* ------------------------------------------------------------------------- */
  81
  82 int misc_init_r (void)
  83 {
  84         DECLARE_GLOBAL_DATA_PTR;
  85
  86         /* adjust flash start and offset */
  87         gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
  88         gd->bd->bi_flashoffset = 0;
  89
  90         return (0);
  91 }
  92
  93
  94 /*
  95  * Check Board Identity:
  96  */
  97
  98 int checkboard (void)
  99 {
 100         char str[64];
 101         int i = getenv_r ("serial#", str, sizeof(str));
 102         int flashcnt;
 103         int delay;
 104         volatile unsigned char *led_reg = (unsigned char *)((ulong)CAN_BA + 0x1000);
 105
 106         puts ("Board: ");
 107
 108         if (i == -1) {
 109                 puts ("### No HW ID - assuming VOM405");
 110         } else {
 111                 puts(str);
 112         }
 113
 114         printf(" (PLD-Version=%02d)\n", *led_reg);
 115
 116         /*
 117          * Flash LEDs
 118          */
 119         for (flashcnt = 0; flashcnt < 3; flashcnt++) {
 120                 *led_reg = 0x40;        /* LED_B..D off */
 121                 for (delay = 0; delay < 100; delay++)
 122                         udelay(1000);
 123                 *led_reg = 0x47;        /* LED_B..D on */
 124                 for (delay = 0; delay < 50; delay++)
 125                         udelay(1000);
 126         }
 127         *led_reg = 0x40;
 128
 129         return 0;
 130 }
 131
 132 /* ------------------------------------------------------------------------- */
 133
 134 long int initdram (int board_type)
 135 {
 136         unsigned long val;
 137
 138         mtdcr(memcfga, mem_mb0cf);
 139         val = mfdcr(memcfgd);
 140
 141 #if 0
 142         printf("\nmb0cf=%x\n", val); /* test-only */
 143         printf("strap=%x\n", mfdcr(strap)); /* test-only */
 144 #endif
 145
 146         return (4*1024*1024 << ((val & 0x000e0000) >> 17));
 147 }
 148
 149 /* ------------------------------------------------------------------------- */
 150
 151 void reset_phy(void)
 152 {
 153 #ifdef CONFIG_LXT971_NO_SLEEP
 154
 155         /*
 156          * Disable sleep mode in LXT971
 157          */
 158         lxt971_no_sleep();
 159 #endif
 160 }