board/esd/wuh405/wuh405.c

   1 /*
   2  * (C) Copyright 2001-2003
   3  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <asm/processor.h>
  26 #include <command.h>
  27 #include <malloc.h>
  28
  29 /* ------------------------------------------------------------------------- */
  30
  31 #if 0
  32 #define FPGA_DEBUG
  33 #endif
  34
  35 extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
  36
  37 /* fpga configuration data - gzip compressed and generated by bin2c */
  38 const unsigned char fpgadata[] =
  39 {
  40 #include "fpgadata.c"
  41 };
  42
  43 /*
  44  * include common fpga code (for esd boards)
  45  */
  46 #include "../common/fpga.c"
  47
  48
  49 /* Prototypes */
  50 int gunzip(void *, int, unsigned char *, unsigned long *);
  51
  52
  53 int board_early_init_f (void)
  54 {
  55         /*
  56          * IRQ 0-15  405GP internally generated; active high; level sensitive
  57          * IRQ 16    405GP internally generated; active low; level sensitive
  58          * IRQ 17-24 RESERVED
  59          * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
  60          * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
  61          * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
  62          * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
  63          * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
  64          * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
  65          * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
  66          */
  67         mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
  68         mtdcr(UIC0ER, 0x00000000);       /* disable all ints */
  69         mtdcr(UIC0CR, 0x00000000);       /* set all to be non-critical*/
  70         mtdcr(UIC0PR, 0xFFFFFF9F);       /* set int polarities */
  71         mtdcr(UIC0TR, 0x10000000);       /* set int trigger levels */
  72         mtdcr(UIC0VCR, 0x00000001);      /* set vect base=0,INT0 highest priority*/
  73         mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
  74
  75         /*
  76          * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
  77          */
  78         mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */
  79
  80         return 0;
  81 }
  82
  83 int misc_init_r (void)
  84 {
  85         unsigned char *dst;
  86         ulong len = sizeof(fpgadata);
  87         int status;
  88         int index;
  89         int i;
  90
  91         dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
  92         if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
  93                 printf ("GUNZIP ERROR - must RESET board to recover\n");
  94                 do_reset (NULL, 0, 0, NULL);
  95         }
  96
  97         status = fpga_boot(dst, len);
  98         if (status != 0) {
  99                 printf("\nFPGA: Booting failed ");
 100                 switch (status) {
 101                 case ERROR_FPGA_PRG_INIT_LOW:
 102                         printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
 103                         break;
 104                 case ERROR_FPGA_PRG_INIT_HIGH:
 105                         printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
 106                         break;
 107                 case ERROR_FPGA_PRG_DONE:
 108                         printf("(Timeout: DONE not high after programming FPGA)\n ");
 109                         break;
 110                 }
 111
 112                 /* display infos on fpgaimage */
 113                 index = 15;
 114                 for (i=0; i<4; i++) {
 115                         len = dst[index];
 116                         printf("FPGA: %s\n", &(dst[index+1]));
 117                         index += len+3;
 118                 }
 119                 putc ('\n');
 120                 /* delayed reboot */
 121                 for (i=20; i>0; i--) {
 122                         printf("Rebooting in %2d seconds \r",i);
 123                         for (index=0;index<1000;index++)
 124                                 udelay(1000);
 125                 }
 126                 putc ('\n');
 127                 do_reset(NULL, 0, 0, NULL);
 128         }
 129
 130         puts("FPGA:  ");
 131
 132         /* display infos on fpgaimage */
 133         index = 15;
 134         for (i=0; i<4; i++) {
 135                 len = dst[index];
 136                 printf("%s ", &(dst[index+1]));
 137                 index += len+3;
 138         }
 139         putc ('\n');
 140
 141         free(dst);
 142
 143         /*
 144          * Reset FPGA via FPGA_DATA pin
 145          */
 146         SET_FPGA(FPGA_PRG | FPGA_CLK);
 147         udelay(1000); /* wait 1ms */
 148         SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
 149         udelay(1000); /* wait 1ms */
 150
 151         /*
 152          * Reset external DUARTs
 153          */
 154         out_be32((void *)GPIO0_OR,
 155                  in_be32((void *)GPIO0_OR) | CONFIG_SYS_DUART_RST);
 156         udelay(10); /* wait 10us */
 157         out_be32((void *)GPIO0_OR,
 158                  in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_DUART_RST);
 159         udelay(1000); /* wait 1ms */
 160
 161         /*
 162          * Enable interrupts in exar duart mcr[3]
 163          */
 164         out_8((void *)(DUART0_BA + 4), 0x08);
 165         out_8((void *)(DUART1_BA + 4), 0x08);
 166         out_8((void *)(DUART2_BA + 4), 0x08);
 167         out_8((void *)(DUART3_BA + 4), 0x08);
 168
 169         return (0);
 170 }
 171
 172
 173 /*
 174  * Check Board Identity:
 175  */
 176
 177 int checkboard (void)
 178 {
 179         char str[64];
 180         int i = getenv_r ("serial#", str, sizeof(str));
 181
 182         puts ("Board: ");
 183
 184         if (i == -1) {
 185                 puts ("### No HW ID - assuming WUH405");
 186         } else {
 187                 puts(str);
 188         }
 189
 190         putc ('\n');
 191
 192         return 0;
 193 }