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8610: Add 8610 DIU display driver
[people/ms/u-boot.git] / board / freescale / common / fsl_diu_fb.c
1 /*
2 * Copyright 2007 Freescale Semiconductor, Inc.
3 * York Sun <yorksun@freescale.com>
4 *
5 * FSL DIU Framebuffer driver
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26
27 #include <common.h>
28 #include <i2c.h>
29 #include <malloc.h>
30
31 #ifdef CONFIG_FSL_DIU_FB
32
33 #include "fsl_diu_fb.h"
34
35
36 #ifdef DEBUG
37 #define DPRINTF(fmt, args...) printf("%s: " fmt,__FUNCTION__,## args)
38 #else
39 #define DPRINTF(fmt, args...)
40 #endif
41
42 struct fb_var_screeninfo {
43 unsigned int xres; /* visible resolution */
44 unsigned int yres;
45
46 unsigned int bits_per_pixel; /* guess what */
47
48 /* Timing: All values in pixclocks, except pixclock (of course) */
49 unsigned int pixclock; /* pixel clock in ps (pico seconds) */
50 unsigned int left_margin; /* time from sync to picture */
51 unsigned int right_margin; /* time from picture to sync */
52 unsigned int upper_margin; /* time from sync to picture */
53 unsigned int lower_margin;
54 unsigned int hsync_len; /* length of horizontal sync */
55 unsigned int vsync_len; /* length of vertical sync */
56 unsigned int sync; /* see FB_SYNC_* */
57 unsigned int vmode; /* see FB_VMODE_* */
58 unsigned int rotate; /* angle we rotate counter clockwise */
59 };
60
61 struct fb_info {
62 struct fb_var_screeninfo var; /* Current var */
63 unsigned long smem_start; /* Start of frame buffer mem */
64 /* (physical address) */
65 unsigned int smem_len; /* Length of frame buffer mem */
66 unsigned int type; /* see FB_TYPE_* */
67 unsigned int line_length; /* length of a line in bytes */
68
69 char *screen_base;
70 unsigned long screen_size;
71 int logo_height;
72 unsigned int logo_size;
73 };
74
75 struct fb_videomode {
76 const char *name; /* optional */
77 unsigned int refresh; /* optional */
78 unsigned int xres;
79 unsigned int yres;
80 unsigned int pixclock;
81 unsigned int left_margin;
82 unsigned int right_margin;
83 unsigned int upper_margin;
84 unsigned int lower_margin;
85 unsigned int hsync_len;
86 unsigned int vsync_len;
87 unsigned int sync;
88 unsigned int vmode;
89 unsigned int flag;
90 };
91
92 #define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
93 #define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
94 #define FB_VMODE_NONINTERLACED 0 /* non interlaced */
95
96 /*
97 * These parameters give default parameters
98 * for video output 1024x768,
99 * FIXME - change timing to proper amounts
100 * hsync 31.5kHz, vsync 60Hz
101 */
102 static struct fb_videomode fsl_diu_mode_1024 = {
103 .refresh = 60,
104 .xres = 1024,
105 .yres = 768,
106 .pixclock = 15385,
107 .left_margin = 160,
108 .right_margin = 24,
109 .upper_margin = 29,
110 .lower_margin = 3,
111 .hsync_len = 136,
112 .vsync_len = 6,
113 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
114 .vmode = FB_VMODE_NONINTERLACED
115 };
116
117 static struct fb_videomode fsl_diu_mode_1280 = {
118 .name = "1280x1024-60",
119 .refresh = 60,
120 .xres = 1280,
121 .yres = 1024,
122 .pixclock = 9375,
123 .left_margin = 38,
124 .right_margin = 128,
125 .upper_margin = 2,
126 .lower_margin = 7,
127 .hsync_len = 216,
128 .vsync_len = 37,
129 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
130 .vmode = FB_VMODE_NONINTERLACED
131 };
132
133 /*
134 * These are the fields of area descriptor(in DDR memory) for every plane
135 */
136 struct diu_ad {
137 /* Word 0(32-bit) in DDR memory */
138 unsigned int pix_fmt; /* hard coding pixel format */
139 /* Word 1(32-bit) in DDR memory */
140 unsigned int addr;
141 /* Word 2(32-bit) in DDR memory */
142 unsigned int src_size_g_alpha;
143 /* Word 3(32-bit) in DDR memory */
144 unsigned int aoi_size;
145 /* Word 4(32-bit) in DDR memory */
146 unsigned int offset_xyi;
147 /* Word 5(32-bit) in DDR memory */
148 unsigned int offset_xyd;
149 /* Word 6(32-bit) in DDR memory */
150 unsigned int ckmax_r:8;
151 unsigned int ckmax_g:8;
152 unsigned int ckmax_b:8;
153 unsigned int res9:8;
154 /* Word 7(32-bit) in DDR memory */
155 unsigned int ckmin_r:8;
156 unsigned int ckmin_g:8;
157 unsigned int ckmin_b:8;
158 unsigned int res10:8;
159 /* Word 8(32-bit) in DDR memory */
160 unsigned int next_ad;
161 /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
162 unsigned int res1;
163 unsigned int res2;
164 unsigned int res3;
165 }__attribute__ ((packed));
166
167 /*
168 * DIU register map
169 */
170 struct diu {
171 unsigned int desc[3];
172 unsigned int gamma;
173 unsigned int pallete;
174 unsigned int cursor;
175 unsigned int curs_pos;
176 unsigned int diu_mode;
177 unsigned int bgnd;
178 unsigned int bgnd_wb;
179 unsigned int disp_size;
180 unsigned int wb_size;
181 unsigned int wb_mem_addr;
182 unsigned int hsyn_para;
183 unsigned int vsyn_para;
184 unsigned int syn_pol;
185 unsigned int thresholds;
186 unsigned int int_status;
187 unsigned int int_mask;
188 unsigned int colorbar[8];
189 unsigned int filling;
190 unsigned int plut;
191 } __attribute__ ((packed));
192
193 struct diu_hw {
194 struct diu *diu_reg;
195 volatile unsigned int mode; /* DIU operation mode */
196 };
197
198 struct diu_addr {
199 unsigned char * paddr; /* Virtual address */
200 unsigned int offset;
201 };
202
203 #define FSL_DIU_BASE_OFFSET 0x2C000 /* Offset of Display Interface Unit */
204
205 /*
206 * Modes of operation of DIU
207 */
208 #define MFB_MODE0 0 /* DIU off */
209 #define MFB_MODE1 1 /* All three planes output to display */
210 #define MFB_MODE2 2 /* Plane 1 to display,
211 * planes 2+3 written back to memory */
212 #define MFB_MODE3 3 /* All three planes written back to memory */
213 #define MFB_MODE4 4 /* Color bar generation */
214
215 #define MAX_CURS 32
216
217
218
219 static struct fb_info fsl_fb_info;
220 static struct diu_addr gamma, cursor;
221 static struct diu_ad fsl_diu_fb_ad __attribute__ ((aligned(32)));
222 static struct diu_ad dummy_ad __attribute__ ((aligned(32)));
223 static unsigned char *dummy_fb;
224 static struct diu_hw dr = {
225 .mode = MFB_MODE1,
226 };
227
228 int fb_enabled = 0;
229 int fb_initialized = 0;
230 const int default_xres = 1280;
231 const int default_pixel_format = 0x88882317;
232
233 static int map_video_memory(struct fb_info *info, unsigned long bytes_align);
234 static void enable_lcdc(void);
235 static void disable_lcdc(void);
236 static int fsl_diu_enable_panel(struct fb_info *info);
237 static int fsl_diu_disable_panel(struct fb_info *info);
238 static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align);
239 static u32 get_busfreq(void);
240
241
242 int fsl_diu_init(int xres,
243 unsigned int pixel_format,
244 int gamma_fix,
245 unsigned char *splash_bmp)
246 {
247 struct fb_videomode *fsl_diu_mode_db;
248 struct diu_ad *ad = &fsl_diu_fb_ad;
249 struct diu *hw;
250 struct fb_info *info = &fsl_fb_info;
251 struct fb_var_screeninfo *var = &info->var;
252 volatile immap_t *immap = (immap_t *)CFG_IMMR;
253 volatile ccsr_gur_t *gur = &immap->im_gur;
254 volatile unsigned int *guts_clkdvdr = &gur->clkdvdr;
255 unsigned char *gamma_table_base;
256 unsigned int i, j;
257 unsigned long speed_ccb, temp, pixval;
258
259 DPRINTF("Enter fsl_diu_init\n");
260 dr.diu_reg = (struct diu *) (CFG_IMMR + FSL_DIU_BASE_OFFSET);
261 hw = (struct diu *) dr.diu_reg;
262
263 disable_lcdc();
264
265 if (xres == 1280) {
266 fsl_diu_mode_db = &fsl_diu_mode_1280;
267 } else {
268 fsl_diu_mode_db = &fsl_diu_mode_1024;
269 }
270
271 if (0 == fb_initialized) {
272 allocate_buf(&gamma, 768, 32);
273 DPRINTF("gamma is allocated @ 0x%x\n",
274 (unsigned int)gamma.paddr);
275 allocate_buf(&cursor, MAX_CURS * MAX_CURS * 2, 32);
276 DPRINTF("curosr is allocated @ 0x%x\n",
277 (unsigned int)cursor.paddr);
278
279 /* create a dummy fb and dummy ad */
280 dummy_fb = malloc(64);
281 if (NULL == dummy_fb) {
282 printf("Cannot allocate dummy fb\n");
283 return -1;
284 }
285 dummy_ad.addr = cpu_to_le32((unsigned int)dummy_fb);
286 dummy_ad.pix_fmt = 0x88882317;
287 dummy_ad.src_size_g_alpha = 0x04400000; /* alpha = 0 */
288 dummy_ad.aoi_size = 0x02000400;
289 dummy_ad.offset_xyi = 0;
290 dummy_ad.offset_xyd = 0;
291 dummy_ad.next_ad = 0;
292 /* Memory allocation for framebuffer */
293 if (map_video_memory(info, 32)) {
294 printf("Unable to allocate fb memory 1\n");
295 return -1;
296 }
297 } else {
298 memset(info->screen_base, 0, info->smem_len);
299 }
300
301 dr.diu_reg->desc[0] = (unsigned int) &dummy_ad;
302 dr.diu_reg->desc[1] = (unsigned int) &dummy_ad;
303 dr.diu_reg->desc[2] = (unsigned int) &dummy_ad;
304 DPRINTF("dummy dr.diu_reg->desc[0] = 0x%x\n", dr.diu_reg->desc[0]);
305 DPRINTF("dummy desc[0] = 0x%x\n", hw->desc[0]);
306
307 /* read mode info */
308 var->xres = fsl_diu_mode_db->xres;
309 var->yres = fsl_diu_mode_db->yres;
310 var->bits_per_pixel = 32;
311 var->pixclock = fsl_diu_mode_db->pixclock;
312 var->left_margin = fsl_diu_mode_db->left_margin;
313 var->right_margin = fsl_diu_mode_db->right_margin;
314 var->upper_margin = fsl_diu_mode_db->upper_margin;
315 var->lower_margin = fsl_diu_mode_db->lower_margin;
316 var->hsync_len = fsl_diu_mode_db->hsync_len;
317 var->vsync_len = fsl_diu_mode_db->vsync_len;
318 var->sync = fsl_diu_mode_db->sync;
319 var->vmode = fsl_diu_mode_db->vmode;
320 info->line_length = var->xres * var->bits_per_pixel / 8;
321 info->logo_size = 0;
322 info->logo_height = 0;
323
324 ad->pix_fmt = pixel_format;
325 ad->addr = cpu_to_le32((unsigned int)info->screen_base);
326 ad->src_size_g_alpha
327 = cpu_to_le32((var->yres << 12) | var->xres);
328 /* fix me. AOI should not be greater than display size */
329 ad->aoi_size = cpu_to_le32(( var->yres << 16) | var->xres);
330 ad->offset_xyi = 0;
331 ad->offset_xyd = 0;
332
333 /* Disable chroma keying function */
334 ad->ckmax_r = 0;
335 ad->ckmax_g = 0;
336 ad->ckmax_b = 0;
337
338 ad->ckmin_r = 255;
339 ad->ckmin_g = 255;
340 ad->ckmin_b = 255;
341
342 gamma_table_base = gamma.paddr;
343 DPRINTF("gamma_table_base is allocated @ 0x%x\n",
344 (unsigned int)gamma_table_base);
345
346 /* Prep for DIU init - gamma table */
347
348 for (i = 0; i <= 2; i++)
349 for (j = 0; j <= 255; j++)
350 *gamma_table_base++ = j;
351
352 if (gamma_fix == 1) { /* fix the gamma */
353 DPRINTF("Fix gamma table\n");
354 gamma_table_base = gamma.paddr;
355 for (i = 0; i < 256*3; i++) {
356 gamma_table_base[i] = (gamma_table_base[i] << 2)
357 | ((gamma_table_base[i] >> 6) & 0x03);
358 }
359 }
360
361 DPRINTF("update-lcdc: HW - %p\n Disabling DIU\n", hw);
362
363 /* Program DIU registers */
364
365 hw->gamma = (unsigned int) gamma.paddr;
366 hw->cursor= (unsigned int) cursor.paddr;
367 hw->bgnd = 0x007F7F7F; /* BGND */
368 hw->bgnd_wb = 0; /* BGND_WB */
369 hw->disp_size = var->yres << 16 | var->xres; /* DISP SIZE */
370 hw->wb_size = 0; /* WB SIZE */
371 hw->wb_mem_addr = 0; /* WB MEM ADDR */
372 hw->hsyn_para = var->left_margin << 22 | /* BP_H */
373 var->hsync_len << 11 | /* PW_H */
374 var->right_margin; /* FP_H */
375 hw->vsyn_para = var->upper_margin << 22 | /* BP_V */
376 var->vsync_len << 11 | /* PW_V */
377 var->lower_margin; /* FP_V */
378
379 /* Pixel Clock configuration */
380 DPRINTF("DIU: Bus Frequency = %d\n", get_busfreq());
381 speed_ccb = get_busfreq();
382
383 DPRINTF("DIU pixclock in ps - %d\n", var->pixclock);
384 temp = 1;
385 temp *= 1000000000;
386 temp /= var->pixclock;
387 temp *= 1000;
388 pixval = speed_ccb / temp;
389 DPRINTF("DIU pixval = %lu\n", pixval);
390
391 hw->syn_pol = 0; /* SYNC SIGNALS POLARITY */
392 hw->thresholds = 0x00037800; /* The Thresholds */
393 hw->int_status = 0; /* INTERRUPT STATUS */
394 hw->int_mask = 0; /* INT MASK */
395 hw->plut = 0x01F5F666;
396
397 /* Modify PXCLK in GUTS CLKDVDR */
398 DPRINTF("DIU: Current value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
399 temp = *guts_clkdvdr & 0x2000FFFF;
400 *guts_clkdvdr = temp; /* turn off clock */
401 *guts_clkdvdr = temp | 0x80000000 | ((pixval & 0x1F) << 16);
402 DPRINTF("DIU: Modified value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
403
404 fb_initialized = 1;
405
406 if (splash_bmp) {
407 info->logo_height = fsl_diu_display_bmp(splash_bmp, 0, 0, 0);
408 info->logo_size = info->logo_height * info->line_length;
409 DPRINTF("logo height %d, logo_size 0x%x\n",
410 info->logo_height,info->logo_size);
411 }
412
413 /* Enable the DIU */
414 fsl_diu_enable_panel(info);
415 enable_lcdc();
416
417 return 0;
418 }
419
420 char *fsl_fb_open(struct fb_info **info)
421 {
422 *info = &fsl_fb_info;
423 return (char *) ((unsigned int)(*info)->screen_base
424 + (*info)->logo_size);
425 }
426
427 void fsl_diu_close(void)
428 {
429 struct fb_info *info = &fsl_fb_info;
430 fsl_diu_disable_panel(info);
431 }
432
433 static int fsl_diu_enable_panel(struct fb_info *info)
434 {
435 struct diu *hw = dr.diu_reg;
436 struct diu_ad *ad = &fsl_diu_fb_ad;
437
438 DPRINTF("Entered: enable_panel\n");
439 if (hw->desc[0] != (unsigned int)ad)
440 hw->desc[0] = (unsigned int)ad;
441 DPRINTF("desc[0] = 0x%x\n", hw->desc[0]);
442 return 0;
443 }
444
445 static int fsl_diu_disable_panel(struct fb_info *info)
446 {
447 struct diu *hw = dr.diu_reg;
448
449 DPRINTF("Entered: disable_panel\n");
450 if (hw->desc[0] != (unsigned int)&dummy_ad)
451 hw->desc[0] = (unsigned int)&dummy_ad;
452 return 0;
453 }
454
455 static int map_video_memory(struct fb_info *info, unsigned long bytes_align)
456 {
457 unsigned long offset;
458 unsigned long mask;
459
460 DPRINTF("Entered: map_video_memory\n");
461 /* allocate maximum 1280*1024 with 32bpp */
462 info->smem_len = 1280 * 4 *1024 + bytes_align;
463 DPRINTF("MAP_VIDEO_MEMORY: smem_len = %d\n", info->smem_len);
464 info->screen_base = malloc(info->smem_len);
465 if (info->screen_base == NULL) {
466 printf("Unable to allocate fb memory\n");
467 return -1;
468 }
469 info->smem_start = (unsigned int) info->screen_base;
470 mask = bytes_align - 1;
471 offset = (unsigned long)info->screen_base & mask;
472 if (offset) {
473 info->screen_base += offset;
474 info->smem_len = info->smem_len - (bytes_align - offset);
475 } else
476 info->smem_len = info->smem_len - bytes_align;
477
478 info->screen_size = info->smem_len;
479
480 DPRINTF("Allocated fb @ 0x%08lx, size=%d.\n",
481 info->smem_start, info->smem_len);
482
483 return 0;
484 }
485
486 static void enable_lcdc(void)
487 {
488 struct diu *hw = dr.diu_reg;
489
490 DPRINTF("Entered: enable_lcdc, fb_enabled = %d\n", fb_enabled);
491 if (!fb_enabled) {
492 hw->diu_mode = dr.mode;
493 fb_enabled++;
494 }
495 DPRINTF("diu_mode = %d\n", hw->diu_mode);
496 }
497
498 static void disable_lcdc(void)
499 {
500 struct diu *hw = dr.diu_reg;
501
502 DPRINTF("Entered: disable_lcdc, fb_enabled = %d\n", fb_enabled);
503 if (fb_enabled) {
504 hw->diu_mode = 0;
505 fb_enabled = 0;
506 }
507 }
508
509 static u32 get_busfreq(void)
510 {
511 u32 fs_busfreq = 0;
512
513 fs_busfreq = get_bus_freq(0);
514 return fs_busfreq;
515 }
516
517 /*
518 * Align to 64-bit(8-byte), 32-byte, etc.
519 */
520 static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
521 {
522 u32 offset, ssize;
523 u32 mask;
524
525 DPRINTF("Entered: allocate_buf\n");
526 ssize = size + bytes_align;
527 buf->paddr = malloc(ssize);
528 if (!buf->paddr)
529 return -1;
530
531 memset(buf->paddr, 0, ssize);
532 mask = bytes_align - 1;
533 offset = (u32)buf->paddr & mask;
534 if (offset) {
535 buf->offset = bytes_align - offset;
536 buf->paddr = (unsigned char *) ((u32)buf->paddr + offset);
537 } else
538 buf->offset = 0;
539 return 0;
540 }
541
542 int fsl_diu_display_bmp(unsigned char *bmp,
543 int xoffset,
544 int yoffset,
545 int transpar)
546 {
547 struct fb_info *info = &fsl_fb_info;
548 unsigned char r, g, b;
549 unsigned int *fb_t, val;
550 unsigned char *bitmap;
551 unsigned int palette[256];
552 int width, height, bpp, ncolors, raster, offset, x, y, i, k, cpp;
553
554 if (!bmp) {
555 printf("Must supply a bitmap address\n");
556 return 0;
557 }
558
559 raster = bmp[10] + (bmp[11] << 8) + (bmp[12] << 16) + (bmp[13] << 24);
560 width = (bmp[21] << 24) | (bmp[20] << 16) | (bmp[19] << 8) | bmp[18];
561 height = (bmp[25] << 24) | (bmp[24] << 16) | (bmp[23] << 8) | bmp[22];
562 bpp = (bmp[29] << 8) | (bmp[28]);
563 ncolors = bmp[46] + (bmp[47] << 8) + (bmp[48] << 16) + (bmp[49] << 24);
564 bitmap = bmp + raster;
565 cpp = info->var.bits_per_pixel / 8;
566
567 DPRINTF("bmp = 0x%08x\n", (unsigned int)bmp);
568 DPRINTF("bitmap = 0x%08x\n", (unsigned int)bitmap);
569 DPRINTF("width = %d\n", width);
570 DPRINTF("height = %d\n", height);
571 DPRINTF("bpp = %d\n", bpp);
572 DPRINTF("ncolors = %d\n", ncolors);
573
574 DPRINTF("xres = %d\n", info->var.xres);
575 DPRINTF("yres = %d\n", info->var.yres);
576 DPRINTF("Screen_base = 0x%x\n", (unsigned int)info->screen_base);
577
578 if (((width+xoffset) > info->var.xres) ||
579 ((height+yoffset) > info->var.yres)) {
580 printf("bitmap is out of range, image too large or too much offset\n");
581 return 0;
582 }
583 if (bpp < 24) {
584 for (i = 0, offset = 54; i < ncolors; i++, offset += 4)
585 palette[i] = (bmp[offset+2] << 16)
586 + (bmp[offset+1] << 8) + bmp[offset];
587 }
588
589 switch (bpp) {
590 case 1:
591 for (y = height - 1; y >= 0; y--) {
592 fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
593 for (x = 0; x < width; x += 8) {
594 b = *bitmap++;
595 for (k = 0; k < 8; k++) {
596 if (b & 0x80)
597 *fb_t = palette[1];
598 else
599 *fb_t = palette[0];
600 b = b << 1;
601 }
602 }
603 for (i = (width / 2) % 4; i > 0; i--)
604 bitmap++;
605 }
606 break;
607 case 4:
608 for (y = height - 1; y >= 0; y--) {
609 fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
610 for (x = 0; x < width; x += 2) {
611 b = *bitmap++;
612 r = (b >> 4) & 0x0F;
613 g = b & 0x0F;
614 *fb_t++ = palette[r];
615 *fb_t++ = palette[g];
616 }
617 for (i = (width / 2) % 4; i > 0; i--)
618 bitmap++;
619 }
620 break;
621 case 8:
622 for (y = height - 1; y >= 0; y--) {
623 fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
624 for (x = 0; x < width; x++) {
625 *fb_t++ = palette[ *bitmap++ ];
626 }
627 for (i = (width / 2) % 4; i > 0; i--)
628 bitmap++;
629 }
630 break;
631 case 24:
632 for (y = height - 1; y >= 0; y--) {
633 fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
634 for (x = 0; x < width; x++) {
635 b = *bitmap++;
636 g = *bitmap++;
637 r = *bitmap++;
638 val = (r << 16) + (g << 8) + b;
639 *fb_t++ = val;
640 }
641 for (; (x % 4) != 0; x++) /* 4-byte alignment */
642 bitmap++;
643 }
644 break;
645 }
646
647 return height;
648 }
649
650 void fsl_diu_clear_screen(void)
651 {
652 struct fb_info *info = &fsl_fb_info;
653
654 memset(info->screen_base, 0, info->smem_len);
655 }
656 #endif /* CONFIG_FSL_DIU_FB */
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