board/freescale/ls2080a/ls2080a.c

   1 /*
   2  * Copyright 2014 Freescale Semiconductor
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6 #include <common.h>
   7 #include <malloc.h>
   8 #include <errno.h>
   9 #include <netdev.h>
  10 #include <fsl_ifc.h>
  11 #include <fsl_ddr.h>
  12 #include <asm/io.h>
  13 #include <fdt_support.h>
  14 #include <libfdt.h>
  15 #include <fsl_debug_server.h>
  16 #include <fsl-mc/fsl_mc.h>
  17 #include <environment.h>
  18 #include <asm/arch/soc.h>
  19
  20 DECLARE_GLOBAL_DATA_PTR;
  21
  22 int board_init(void)
  23 {
  24         init_final_memctl_regs();
  25
  26 #ifdef CONFIG_ENV_IS_NOWHERE
  27         gd->env_addr = (ulong)&default_environment[0];
  28 #endif
  29
  30         return 0;
  31 }
  32
  33 int board_early_init_f(void)
  34 {
  35         fsl_lsch3_early_init_f();
  36         return 0;
  37 }
  38
  39 void detail_board_ddr_info(void)
  40 {
  41         puts("\nDDR    ");
  42         print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, "");
  43         print_ddr_info(0);
  44 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
  45         if (gd->bd->bi_dram[2].size) {
  46                 puts("\nDP-DDR ");
  47                 print_size(gd->bd->bi_dram[2].size, "");
  48                 print_ddr_info(CONFIG_DP_DDR_CTRL);
  49         }
  50 #endif
  51 }
  52
  53 int dram_init(void)
  54 {
  55         gd->ram_size = initdram(0);
  56
  57         return 0;
  58 }
  59
  60 #if defined(CONFIG_ARCH_MISC_INIT)
  61 int arch_misc_init(void)
  62 {
  63 #ifdef CONFIG_FSL_DEBUG_SERVER
  64         debug_server_init();
  65 #endif
  66
  67         return 0;
  68 }
  69 #endif
  70
  71 unsigned long get_dram_size_to_hide(void)
  72 {
  73         unsigned long dram_to_hide = 0;
  74
  75 /* Carve the Debug Server private DRAM block from the end of DRAM */
  76 #ifdef CONFIG_FSL_DEBUG_SERVER
  77         dram_to_hide += debug_server_get_dram_block_size();
  78 #endif
  79
  80 /* Carve the MC private DRAM block from the end of DRAM */
  81 #ifdef CONFIG_FSL_MC_ENET
  82         dram_to_hide += mc_get_dram_block_size();
  83 #endif
  84
  85         return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN);
  86 }
  87
  88 int board_eth_init(bd_t *bis)
  89 {
  90         int error = 0;
  91
  92 #ifdef CONFIG_SMC91111
  93         error = smc91111_initialize(0, CONFIG_SMC91111_BASE);
  94 #endif
  95
  96 #ifdef CONFIG_FSL_MC_ENET
  97         error = cpu_eth_init(bis);
  98 #endif
  99         return error;
 100 }
 101
 102 #ifdef CONFIG_FSL_MC_ENET
 103 void fdt_fixup_board_enet(void *fdt)
 104 {
 105         int offset;
 106
 107         offset = fdt_path_offset(fdt, "/fsl-mc");
 108
 109         /*
 110          * TODO: Remove this when backward compatibility
 111          * with old DT node (fsl,dprc@0) is no longer needed.
 112          */
 113         if (offset < 0)
 114                 offset = fdt_path_offset(fdt, "/fsl,dprc@0");
 115
 116         if (offset < 0) {
 117                 printf("%s: ERROR: fsl-mc node not found in device tree (error %d)\n",
 118                        __func__, offset);
 119                 return;
 120         }
 121
 122         if (get_mc_boot_status() == 0)
 123                 fdt_status_okay(fdt, offset);
 124         else
 125                 fdt_status_fail(fdt, offset);
 126 }
 127 #endif
 128
 129 #ifdef CONFIG_OF_BOARD_SETUP
 130 int ft_board_setup(void *blob, bd_t *bd)
 131 {
 132         u64 base[CONFIG_NR_DRAM_BANKS];
 133         u64 size[CONFIG_NR_DRAM_BANKS];
 134
 135         ft_cpu_setup(blob, bd);
 136
 137         /* fixup DT for the two GPP DDR banks */
 138         base[0] = gd->bd->bi_dram[0].start;
 139         size[0] = gd->bd->bi_dram[0].size;
 140         base[1] = gd->bd->bi_dram[1].start;
 141         size[1] = gd->bd->bi_dram[1].size;
 142
 143         fdt_fixup_memory_banks(blob, base, size, 2);
 144
 145 #ifdef CONFIG_FSL_MC_ENET
 146         fdt_fixup_board_enet(blob);
 147         fsl_mc_ldpaa_exit(bd);
 148 #endif
 149
 150         return 0;
 151 }
 152 #endif