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git.ipfire.org Git - people/ms/u-boot.git/blob - board/freescale/m5329evb/nand.c
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/immap.h>
16 DECLARE_GLOBAL_DATA_PTR
;
18 #if defined(CONFIG_CMD_NAND)
20 #include <linux/mtd/mtd.h>
25 static void nand_hwcontrol(struct mtd_info
*mtdinfo
, int cmd
, unsigned int ctrl
)
27 struct nand_chip
*this = mtdinfo
->priv
;
28 volatile u16
*nCE
= (u16
*) CONFIG_SYS_LATCH_ADDR
;
30 if (ctrl
& NAND_CTRL_CHANGE
) {
31 ulong IO_ADDR_W
= (ulong
) this->IO_ADDR_W
;
33 IO_ADDR_W
&= ~(SET_ALE
| SET_CLE
);
45 this->IO_ADDR_W
= (void *)IO_ADDR_W
;
48 if (cmd
!= NAND_CMD_NONE
)
49 writeb(cmd
, this->IO_ADDR_W
);
52 int board_nand_init(struct nand_chip
*nand
)
54 gpio_t
*gpio
= (gpio_t
*) MMAP_GPIO
;
57 * set up pin configuration - enabled 2nd output buffer's signals
58 * (nand_ngpio - nCE USB1/2_PWR_EN, LATCH_GPIOs, LCD_VEEEN, etc)
61 clrbits_8(&gpio
->par_timer
, GPIO_PAR_TIN3_TIN3
);
62 setbits_8(&gpio
->pddr_timer
, 0x08);
63 setbits_8(&gpio
->ppd_timer
, 0x08);
64 out_8(&gpio
->pclrr_timer
, 0);
65 out_8(&gpio
->podr_timer
, 0);
67 nand
->chip_delay
= 60;
68 nand
->ecc
.mode
= NAND_ECC_SOFT
;
69 nand
->cmd_ctrl
= nand_hwcontrol
;