board/freescale/mpc8560ads/ddr.c

   1 /*
   2  * Copyright 2008 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0
   5  */
   6
   7 #include <common.h>
   8
   9 #include <fsl_ddr_sdram.h>
  10 #include <fsl_ddr_dimm_params.h>
  11
  12 void fsl_ddr_board_options(memctl_options_t *popts,
  13                                 dimm_params_t *pdimm,
  14                                 unsigned int ctrl_num)
  15 {
  16         /*
  17          * Factors to consider for CPO:
  18          *      - frequency
  19          *      - ddr1 vs. ddr2
  20          */
  21         popts->cpo_override = 0;
  22
  23         /*
  24          * Factors to consider for write data delay:
  25          *      - number of DIMMs
  26          *
  27          * 1 = 1/4 clock delay
  28          * 2 = 1/2 clock delay
  29          * 3 = 3/4 clock delay
  30          * 4 = 1   clock delay
  31          * 5 = 5/4 clock delay
  32          * 6 = 3/2 clock delay
  33          */
  34         popts->write_data_delay = 3;
  35
  36         /* 2T timing enable */
  37         popts->twot_en = 1;
  38
  39         /*
  40          * Factors to consider for half-strength driver enable:
  41          *      - number of DIMMs installed
  42          */
  43         popts->half_strength_driver_enable = 0;
  44 }