board/freescale/mpc8568mds/law.c

   1 /*
   2  * Copyright 2008, 2010-2011 Freescale Semiconductor, Inc.
   3  *
   4  * (C) Copyright 2000
   5  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include <asm/fsl_law.h>
  12 #include <asm/mmu.h>
  13
  14 /*
  15  * LAW(Local Access Window) configuration:
  16  *
  17  *0)   0x0000_0000   0x7fff_ffff     DDR                     2G
  18  *1)   0x8000_0000   0x9fff_ffff     PCI1 MEM                512MB
  19  *2)   0xa000_0000   0xbfff_ffff     PCIe MEM                512MB
  20  *-)   0xe000_0000   0xe00f_ffff     CCSR                    1M
  21  *3)   0xe200_0000   0xe27f_ffff     PCI1 I/O                8M
  22  *4)   0xe280_0000   0xe2ff_ffff     PCIe I/O                8M
  23  *5)   0xc000_0000   0xdfff_ffff     SRIO                    512MB
  24  *6.a) 0xf000_0000   0xf3ff_ffff     SDRAM                   64MB
  25  *6.b) 0xf800_0000   0xf800_7fff     BCSR                    32KB
  26  *6.c) 0xf800_8000   0xf800_ffff     PIB (CS4)               32KB
  27  *6.d) 0xf801_0000   0xf801_7fff     PIB (CS5)               32KB
  28  *6.e) 0xfe00_0000   0xffff_ffff     Flash                   32MB
  29  *
  30  *Notes:
  31  *    CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
  32  *    If flash is 8M at default position (last 8M), no LAW needed.
  33  *
  34  */
  35
  36 struct law_entry law_table[] = {
  37         /* LBC window - maps 256M.  That's SDRAM, BCSR, PIBs, and Flash */
  38         SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
  39 };
  40
  41 int num_law_entries = ARRAY_SIZE(law_table);