board/freescale/p1_p2_rdb/p1_p2_rdb.c

   1 /*
   2  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <command.h>
   9 #include <asm/processor.h>
  10 #include <asm/mmu.h>
  11 #include <asm/cache.h>
  12 #include <asm/immap_85xx.h>
  13 #include <asm/fsl_serdes.h>
  14 #include <asm/io.h>
  15 #include <miiphy.h>
  16 #include <libfdt.h>
  17 #include <fdt_support.h>
  18 #include <fsl_mdio.h>
  19 #include <tsec.h>
  20 #include <vsc7385.h>
  21 #include <netdev.h>
  22 #include <rtc.h>
  23 #include <i2c.h>
  24 #include <hwconfig.h>
  25
  26 DECLARE_GLOBAL_DATA_PTR;
  27
  28 #define VSC7385_RST_SET         0x00080000
  29 #define SLIC_RST_SET            0x00040000
  30 #define SGMII_PHY_RST_SET       0x00020000
  31 #define PCIE_RST_SET            0x00010000
  32 #define RGMII_PHY_RST_SET       0x02000000
  33
  34 #define USB_RST_CLR             0x04000000
  35 #define USB2_PORT_OUT_EN        0x01000000
  36
  37 #define GPIO_DIR                0x060f0000
  38
  39 #define BOARD_PERI_RST_SET      VSC7385_RST_SET | SLIC_RST_SET | \
  40                                 SGMII_PHY_RST_SET | PCIE_RST_SET | \
  41                                 RGMII_PHY_RST_SET
  42
  43 #define SYSCLK_MASK     0x00200000
  44 #define BOARDREV_MASK   0x10100000
  45 #define BOARDREV_C      0x00100000
  46 #define BOARDREV_D      0x00000000
  47
  48 #define SYSCLK_66       66666666
  49 #define SYSCLK_100      100000000
  50
  51 unsigned long get_board_sys_clk(ulong dummy)
  52 {
  53         volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
  54         u32 val_gpdat, sysclk_gpio;
  55
  56         val_gpdat = in_be32(&pgpio->gpdat);
  57         sysclk_gpio = val_gpdat & SYSCLK_MASK;
  58
  59         if(sysclk_gpio == 0)
  60                 return SYSCLK_66;
  61         else
  62                 return SYSCLK_100;
  63
  64         return 0;
  65 }
  66
  67 #ifdef CONFIG_MMC
  68 int board_early_init_f (void)
  69 {
  70         volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  71
  72         setbits_be32(&gur->pmuxcr,
  73                         (MPC85xx_PMUXCR_SDHC_CD |
  74                          MPC85xx_PMUXCR_SDHC_WP));
  75         return 0;
  76 }
  77 #endif
  78
  79 int checkboard (void)
  80 {
  81         u32 val_gpdat, board_rev_gpio;
  82         volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
  83         char board_rev = 0;
  84         struct cpu_type *cpu;
  85
  86         val_gpdat = in_be32(&pgpio->gpdat);
  87         board_rev_gpio = val_gpdat & BOARDREV_MASK;
  88         if (board_rev_gpio == BOARDREV_C)
  89                 board_rev = 'C';
  90         else if (board_rev_gpio == BOARDREV_D)
  91                 board_rev = 'D';
  92         else
  93                 panic ("Unexpected Board REV %x detected!!\n", board_rev_gpio);
  94
  95         cpu = gd->arch.cpu;
  96         printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev);
  97
  98         setbits_be32(&pgpio->gpdir, GPIO_DIR);
  99
 100 /*
 101  * Bringing the following peripherals out of reset via GPIOs
 102  * 0 = reset and 1 = out of reset
 103  * GPIO12 - Reset to Ethernet Switch
 104  * GPIO13 - Reset to SLIC/SLAC devices
 105  * GPIO14 - Reset to SGMII_PHY_N
 106  * GPIO15 - Reset to PCIe slots
 107  * GPIO6  - Reset to RGMII PHY
 108  * GPIO5  - Reset to USB3300 devices 1 = reset and 0 = out of reset
 109  */
 110         clrsetbits_be32(&pgpio->gpdat, USB_RST_CLR, BOARD_PERI_RST_SET);
 111
 112         return 0;
 113 }
 114
 115 int misc_init_r(void)
 116 {
 117 #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
 118         ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
 119         ccsr_gpio_t *gpio = (void *)CONFIG_SYS_MPC85xx_GPIO_ADDR;
 120
 121         setbits_be32(&gpio->gpdir, USB2_PORT_OUT_EN);
 122         setbits_be32(&gpio->gpdat, USB2_PORT_OUT_EN);
 123         setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_ELBC_OFF_USB2_ON);
 124 #endif
 125         return 0;
 126 }
 127
 128 int board_early_init_r(void)
 129 {
 130         const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
 131         const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
 132         volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 133         unsigned int orig_bus = i2c_get_bus_num();
 134         u8 i2c_data;
 135
 136         i2c_set_bus_num(1);
 137         if (i2c_read(CONFIG_SYS_I2C_PCA9557_ADDR, 0,
 138                 1, &i2c_data, sizeof(i2c_data)) == 0) {
 139                 if (i2c_data & 0x2)
 140                         puts("NOR Flash Bank : Secondary\n");
 141                 else
 142                         puts("NOR Flash Bank : Primary\n");
 143
 144                 if (i2c_data & 0x1) {
 145                         setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
 146                         puts("SD/MMC : 8-bit Mode\n");
 147                         puts("eSPI : Disabled\n");
 148                 } else {
 149                         puts("SD/MMC : 4-bit Mode\n");
 150                         puts("eSPI : Enabled\n");
 151                 }
 152         } else {
 153                 puts("Failed reading I2C Chip 0x18 on bus 1\n");
 154         }
 155         i2c_set_bus_num(orig_bus);
 156
 157         /*
 158          * Remap Boot flash region to caching-inhibited
 159          * so that flash can be erased properly.
 160          */
 161
 162         /* Flush d-cache and invalidate i-cache of any FLASH data */
 163         flush_dcache();
 164         invalidate_icache();
 165
 166         /* invalidate existing TLB entry for flash */
 167         disable_tlb(flash_esel);
 168
 169         set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
 170                         MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 171                         0, flash_esel, BOOKE_PAGESZ_16M, 1);
 172         rtc_reset();
 173         return 0;
 174 }
 175
 176
 177 #ifdef CONFIG_TSEC_ENET
 178 int board_eth_init(bd_t *bis)
 179 {
 180         struct fsl_pq_mdio_info mdio_info;
 181         struct tsec_info_struct tsec_info[4];
 182         int num = 0;
 183         char *tmp;
 184         unsigned int vscfw_addr;
 185
 186 #ifdef CONFIG_TSEC1
 187         SET_STD_TSEC_INFO(tsec_info[num], 1);
 188         num++;
 189 #endif
 190 #ifdef CONFIG_TSEC2
 191         SET_STD_TSEC_INFO(tsec_info[num], 2);
 192         num++;
 193 #endif
 194 #ifdef CONFIG_TSEC3
 195         SET_STD_TSEC_INFO(tsec_info[num], 3);
 196         if (is_serdes_configured(SGMII_TSEC3)) {
 197                 puts("eTSEC3 is in sgmii mode.\n");
 198                 tsec_info[num].flags |= TSEC_SGMII;
 199         }
 200         num++;
 201 #endif
 202         if (!num) {
 203                 printf("No TSECs initialized\n");
 204                 return 0;
 205         }
 206 #ifdef CONFIG_VSC7385_ENET
 207 /* If a VSC7385 microcode image is present, then upload it. */
 208         if ((tmp = getenv ("vscfw_addr")) != NULL) {
 209                 vscfw_addr = simple_strtoul (tmp, NULL, 16);
 210                 printf("uploading VSC7385 microcode from %x\n", vscfw_addr);
 211                 if (vsc7385_upload_firmware((void *) vscfw_addr,
 212                                         CONFIG_VSC7385_IMAGE_SIZE))
 213                         puts("Failure uploading VSC7385 microcode.\n");
 214         } else
 215                 puts("No address specified for VSC7385 microcode.\n");
 216 #endif
 217
 218         mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
 219         mdio_info.name = DEFAULT_MII_NAME;
 220         fsl_pq_mdio_init(bis, &mdio_info);
 221
 222         tsec_eth_init(bis, tsec_info, num);
 223
 224         return pci_eth_init(bis);
 225 }
 226 #endif
 227
 228 #if defined(CONFIG_OF_BOARD_SETUP)
 229 extern void ft_pci_board_setup(void *blob);
 230
 231 void ft_board_setup(void *blob, bd_t *bd)
 232 {
 233         const char *soc_usb_compat = "fsl-usb2-dr";
 234         int err, usb1_off, usb2_off;
 235         phys_addr_t base;
 236         phys_size_t size;
 237
 238         ft_cpu_setup(blob, bd);
 239
 240         base = getenv_bootm_low();
 241         size = getenv_bootm_size();
 242
 243 #if defined(CONFIG_PCI)
 244         ft_pci_board_setup(blob);
 245 #endif /* #if defined(CONFIG_PCI) */
 246
 247         fdt_fixup_memory(blob, (u64)base, (u64)size);
 248
 249 #if defined(CONFIG_HAS_FSL_DR_USB)
 250         fdt_fixup_dr_usb(blob, bd);
 251 #endif
 252
 253 #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
 254         /* Delete eLBC node as it is muxed with USB2 controller */
 255         if (hwconfig("usb2")) {
 256                 const char *soc_elbc_compat = "fsl,p1020-elbc";
 257                 int off = fdt_node_offset_by_compatible(blob, -1,
 258                         soc_elbc_compat);
 259                 if (off < 0) {
 260                         printf("WARNING: could not find compatible node"
 261                                 " %s: %s.\n", soc_elbc_compat,
 262                                 fdt_strerror(off));
 263                                 return;
 264                 }
 265                 err = fdt_del_node(blob, off);
 266                 if (err < 0) {
 267                         printf("WARNING: could not remove %s: %s.\n",
 268                                 soc_elbc_compat, fdt_strerror(err));
 269                 }
 270                 return;
 271         }
 272 #endif
 273         /* Delete USB2 node as it is muxed with eLBC */
 274         usb1_off = fdt_node_offset_by_compatible(blob, -1,
 275                 soc_usb_compat);
 276         if (usb1_off < 0) {
 277                 printf("WARNING: could not find compatible node"
 278                         " %s: %s.\n", soc_usb_compat,
 279                         fdt_strerror(usb1_off));
 280                 return;
 281         }
 282         usb2_off = fdt_node_offset_by_compatible(blob, usb1_off,
 283                         soc_usb_compat);
 284         if (usb2_off < 0) {
 285                 printf("WARNING: could not find compatible node"
 286                         " %s: %s.\n", soc_usb_compat,
 287                         fdt_strerror(usb2_off));
 288                 return;
 289         }
 290         err = fdt_del_node(blob, usb2_off);
 291         if (err < 0)
 292                 printf("WARNING: could not remove %s: %s.\n",
 293                         soc_usb_compat, fdt_strerror(err));
 294 }
 295 #endif