board/freescale/p1_p2_rdb_pc/spl.c

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <console.h>
   9 #include <ns16550.h>
  10 #include <malloc.h>
  11 #include <mmc.h>
  12 #include <nand.h>
  13 #include <i2c.h>
  14 #include <fsl_esdhc.h>
  15 #include <spi_flash.h>
  16 #include "../common/spl.h"
  17
  18 DECLARE_GLOBAL_DATA_PTR;
  19
  20 phys_size_t get_effective_memsize(void)
  21 {
  22         return CONFIG_SYS_L2_SIZE;
  23 }
  24
  25 void board_init_f(ulong bootflag)
  26 {
  27         u32 plat_ratio, bus_clk;
  28         ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
  29
  30         console_init_f();
  31
  32         /* Set pmuxcr to allow both i2c1 and i2c2 */
  33         setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
  34         setbits_be32(&gur->pmuxcr,
  35                      in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
  36
  37         /* Read back the register to synchronize the write. */
  38         in_be32(&gur->pmuxcr);
  39
  40 #ifdef CONFIG_SPL_SPI_BOOT
  41         clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
  42 #endif
  43
  44         /* initialize selected port with appropriate baud rate */
  45         plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
  46         plat_ratio >>= 1;
  47         bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
  48         gd->bus_clk = bus_clk;
  49
  50         NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
  51                      bus_clk / 16 / CONFIG_BAUDRATE);
  52 #ifdef CONFIG_SPL_MMC_BOOT
  53         puts("\nSD boot...\n");
  54 #elif defined(CONFIG_SPL_SPI_BOOT)
  55         puts("\nSPI Flash boot...\n");
  56 #endif
  57
  58         /* copy code to RAM and jump to it - this should not return */
  59         /* NOTE - code has to be copied out of NAND buffer before
  60          * other blocks can be read.
  61          */
  62         relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
  63 }
  64
  65 void board_init_r(gd_t *gd, ulong dest_addr)
  66 {
  67         /* Pointer is writable since we allocated a register for it */
  68         gd = (gd_t *)CONFIG_SPL_GD_ADDR;
  69         bd_t *bd;
  70
  71         memset(gd, 0, sizeof(gd_t));
  72         bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
  73         memset(bd, 0, sizeof(bd_t));
  74         gd->bd = bd;
  75         bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
  76         bd->bi_memsize = CONFIG_SYS_L2_SIZE;
  77
  78         arch_cpu_init();
  79         get_clocks();
  80         mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
  81                         CONFIG_SPL_RELOC_MALLOC_SIZE);
  82         gd->flags |= GD_FLG_FULL_MALLOC_INIT;
  83
  84 #ifndef CONFIG_SPL_NAND_BOOT
  85         env_init();
  86 #endif
  87 #ifdef CONFIG_SPL_MMC_BOOT
  88         mmc_initialize(bd);
  89 #endif
  90         /* relocate environment function pointers etc. */
  91 #ifdef CONFIG_SPL_NAND_BOOT
  92         nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
  93                             (uchar *)CONFIG_ENV_ADDR);
  94         gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
  95         gd->env_valid = 1;
  96 #else
  97         env_relocate();
  98 #endif
  99
 100 #ifdef CONFIG_SYS_I2C
 101         i2c_init_all();
 102 #else
 103         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 104 #endif
 105
 106         dram_init();
 107 #ifdef CONFIG_SPL_NAND_BOOT
 108         puts("Tertiary program loader running in sram...");
 109 #else
 110         puts("Second program loader running in sram...\n");
 111 #endif
 112
 113 #ifdef CONFIG_SPL_MMC_BOOT
 114         mmc_boot();
 115 #elif defined(CONFIG_SPL_SPI_BOOT)
 116         fsl_spi_boot();
 117 #elif defined(CONFIG_SPL_NAND_BOOT)
 118         nand_boot();
 119 #endif
 120 }