board/freescale/t208xqds/spl.c

   1 /* Copyright 2013 Freescale Semiconductor, Inc.
   2  *
   3  * SPDX-License-Identifier:    GPL-2.0+
   4  */
   5
   6 #include <common.h>
   7 #include <console.h>
   8 #include <malloc.h>
   9 #include <ns16550.h>
  10 #include <nand.h>
  11 #include <i2c.h>
  12 #include <mmc.h>
  13 #include <fsl_esdhc.h>
  14 #include <spi_flash.h>
  15 #include "../common/qixis.h"
  16 #include "t208xqds_qixis.h"
  17
  18 DECLARE_GLOBAL_DATA_PTR;
  19
  20 phys_size_t get_effective_memsize(void)
  21 {
  22         return CONFIG_SYS_L3_SIZE;
  23 }
  24
  25 unsigned long get_board_sys_clk(void)
  26 {
  27         u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
  28
  29         switch (sysclk_conf & 0x0F) {
  30         case QIXIS_SYSCLK_83:
  31                 return 83333333;
  32         case QIXIS_SYSCLK_100:
  33                 return 100000000;
  34         case QIXIS_SYSCLK_125:
  35                 return 125000000;
  36         case QIXIS_SYSCLK_133:
  37                 return 133333333;
  38         case QIXIS_SYSCLK_150:
  39                 return 150000000;
  40         case QIXIS_SYSCLK_160:
  41                 return 160000000;
  42         case QIXIS_SYSCLK_166:
  43                 return 166666666;
  44         }
  45         return 66666666;
  46 }
  47
  48 unsigned long get_board_ddr_clk(void)
  49 {
  50         u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
  51
  52         switch ((ddrclk_conf & 0x30) >> 4) {
  53         case QIXIS_DDRCLK_100:
  54                 return 100000000;
  55         case QIXIS_DDRCLK_125:
  56                 return 125000000;
  57         case QIXIS_DDRCLK_133:
  58                 return 133333333;
  59         }
  60         return 66666666;
  61 }
  62
  63 void board_init_f(ulong bootflag)
  64 {
  65         u32 plat_ratio, sys_clk, ccb_clk;
  66         ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
  67
  68         /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
  69         memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
  70
  71         /* Update GD pointer */
  72         gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
  73
  74         console_init_f();
  75
  76         /* initialize selected port with appropriate baud rate */
  77         sys_clk = get_board_sys_clk();
  78         plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
  79         ccb_clk = sys_clk * plat_ratio / 2;
  80
  81         NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
  82                      ccb_clk / 16 / CONFIG_BAUDRATE);
  83
  84 #if defined(CONFIG_SPL_MMC_BOOT)
  85         puts("\nSD boot...\n");
  86 #elif defined(CONFIG_SPL_SPI_BOOT)
  87         puts("\nSPI boot...\n");
  88 #elif defined(CONFIG_SPL_NAND_BOOT)
  89         puts("\nNAND boot...\n");
  90 #endif
  91
  92         relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
  93 }
  94
  95 void board_init_r(gd_t *gd, ulong dest_addr)
  96 {
  97         bd_t *bd;
  98
  99         bd = (bd_t *)(gd + sizeof(gd_t));
 100         memset(bd, 0, sizeof(bd_t));
 101         gd->bd = bd;
 102         bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
 103         bd->bi_memsize = CONFIG_SYS_L3_SIZE;
 104
 105         probecpu();
 106         get_clocks();
 107         mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
 108                         CONFIG_SPL_RELOC_MALLOC_SIZE);
 109
 110 #ifdef CONFIG_SPL_NAND_BOOT
 111         nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
 112                             (uchar *)CONFIG_ENV_ADDR);
 113 #endif
 114 #ifdef CONFIG_SPL_MMC_BOOT
 115         mmc_initialize(bd);
 116         mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
 117                            (uchar *)CONFIG_ENV_ADDR);
 118 #endif
 119 #ifdef CONFIG_SPL_SPI_BOOT
 120         spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
 121                            (uchar *)CONFIG_ENV_ADDR);
 122 #endif
 123
 124         gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
 125         gd->env_valid = 1;
 126
 127         i2c_init_all();
 128
 129         gd->ram_size = initdram(0);
 130
 131 #ifdef CONFIG_SPL_MMC_BOOT
 132         mmc_boot();
 133 #elif defined(CONFIG_SPL_SPI_BOOT)
 134         spi_boot();
 135 #elif defined(CONFIG_SPL_NAND_BOOT)
 136         nand_boot();
 137 #endif
 138 }