2 * Copyright 2010 Freescale Semiconductor, Inc.
3 * Authors: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
4 * Timur Tabi <timur@freescale.com>
6 * SPDX-License-Identifier: GPL-2.0+
12 struct fsl_e_tlb_entry tlb_table
[] = {
13 /* TLB 0 - for temp stack in cache */
14 SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR
, CONFIG_SYS_INIT_RAM_ADDR
,
15 MAS3_SX
|MAS3_SW
|MAS3_SR
, 0,
16 0, 0, BOOKE_PAGESZ_4K
, 0),
17 SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR
+ 4 * 1024,
18 CONFIG_SYS_INIT_RAM_ADDR
+ 4 * 1024,
19 MAS3_SX
|MAS3_SW
|MAS3_SR
, 0,
20 0, 0, BOOKE_PAGESZ_4K
, 0),
21 SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR
+ 8 * 1024,
22 CONFIG_SYS_INIT_RAM_ADDR
+ 8 * 1024,
23 MAS3_SX
|MAS3_SW
|MAS3_SR
, 0,
24 0, 0, BOOKE_PAGESZ_4K
, 0),
25 SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR
+ 12 * 1024,
26 CONFIG_SYS_INIT_RAM_ADDR
+ 12 * 1024,
27 MAS3_SX
|MAS3_SW
|MAS3_SR
, 0,
28 0, 0, BOOKE_PAGESZ_4K
, 0),
31 /* *I*** - Covers boot page */
32 SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000,
33 MAS3_SX
|MAS3_SW
|MAS3_SR
, MAS2_I
,
34 0, 0, BOOKE_PAGESZ_4K
, 1),
37 SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR
, CONFIG_SYS_CCSRBAR_PHYS
,
38 MAS3_SX
|MAS3_SW
|MAS3_SR
, MAS2_I
|MAS2_G
,
39 0, 1, BOOKE_PAGESZ_1M
, 1),
42 SET_TLB_ENTRY(1, CONFIG_SYS_ELBC_BASE
, CONFIG_SYS_ELBC_BASE_PHYS
,
43 MAS3_SX
|MAS3_SW
|MAS3_SR
, MAS2_I
|MAS2_G
,
44 0, 2, BOOKE_PAGESZ_1M
, 1),
46 #if defined(CONFIG_TRAILBLAZER)
48 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR
, CONFIG_SYS_INIT_L2_ADDR_PHYS
,
49 MAS3_SX
|MAS3_SW
|MAS3_SR
, MAS2_I
|MAS2_G
,
50 0, 9, BOOKE_PAGESZ_256K
, 1),
53 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT
, CONFIG_SYS_PCIE1_MEM_PHYS
,
54 MAS3_SX
|MAS3_SW
|MAS3_SR
, MAS2_I
|MAS2_G
,
55 0, 3, BOOKE_PAGESZ_256M
, 1),
56 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT
+ 0x10000000,
57 CONFIG_SYS_PCIE1_MEM_PHYS
+ 0x10000000,
58 MAS3_SX
|MAS3_SW
|MAS3_SR
, MAS2_I
|MAS2_G
,
59 0, 4, BOOKE_PAGESZ_256M
, 1),
62 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT
, CONFIG_SYS_PCIE1_IO_PHYS
,
63 MAS3_SX
|MAS3_SW
|MAS3_SR
, MAS2_I
|MAS2_G
,
64 0, 5, BOOKE_PAGESZ_256K
, 1),
66 #ifdef CONFIG_SYS_RAMBOOT
67 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE
, CONFIG_SYS_DDR_SDRAM_BASE
,
68 MAS3_SX
|MAS3_SW
|MAS3_SR
, MAS2_M
,
69 0, 6, BOOKE_PAGESZ_1G
, 1),
74 int num_tlb_entries
= ARRAY_SIZE(tlb_table
);