]>
git.ipfire.org Git - people/ms/u-boot.git/blob - board/highbank/highbank.c
2 * Copyright 2010-2011 Calxeda, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
12 #include <linux/sizes.h>
15 #define HB_AHCI_BASE 0xffe08000
17 #define HB_SCU_A9_PWR_STATUS 0xfff10008
18 #define HB_SREG_A9_PWR_REQ 0xfff3cf00
19 #define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04
20 #define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20
22 #define HB_PWR_SUSPEND 0
23 #define HB_PWR_SOFT_RESET 1
24 #define HB_PWR_HARD_RESET 2
25 #define HB_PWR_SHUTDOWN 3
27 #define PWRDOM_STAT_SATA 0x80000000
28 #define PWRDOM_STAT_PCI 0x40000000
29 #define PWRDOM_STAT_EMMC 0x20000000
31 #define HB_SCU_A9_PWR_NORMAL 0
32 #define HB_SCU_A9_PWR_DORMANT 2
33 #define HB_SCU_A9_PWR_OFF 3
35 DECLARE_GLOBAL_DATA_PTR
;
38 * Miscellaneous platform dependent initialisations
47 /* We know all the init functions have been run now */
48 int board_eth_init(bd_t
*bis
)
52 #ifdef CONFIG_CALXEDA_XGMAC
53 rc
+= calxedaxgmac_initialize(0, 0xfff50000);
54 rc
+= calxedaxgmac_initialize(1, 0xfff51000);
59 #ifdef CONFIG_SCSI_AHCI_PLAT
62 u32 reg
= readl(HB_SREG_A9_PWRDOM_STAT
);
64 if (reg
& PWRDOM_STAT_SATA
) {
65 ahci_init((void __iomem
*)HB_AHCI_BASE
);
71 #ifdef CONFIG_MISC_INIT_R
77 boot_choice
= readl(HB_SREG_A9_BOOT_SRC_STAT
) & 0xff;
78 sprintf(envbuffer
, "bootcmd%d", boot_choice
);
79 if (getenv(envbuffer
)) {
80 sprintf(envbuffer
, "run bootcmd%d", boot_choice
);
81 setenv("bootcmd", envbuffer
);
83 setenv("bootcmd", "");
91 gd
->ram_size
= SZ_512M
;
95 void dram_init_banksize(void)
97 gd
->bd
->bi_dram
[0].start
= CONFIG_SYS_SDRAM_BASE
;
98 gd
->bd
->bi_dram
[0].size
= PHYS_SDRAM_1_SIZE
;
101 #if defined(CONFIG_OF_BOARD_SETUP)
102 int ft_board_setup(void *fdt
, bd_t
*bd
)
104 static const char disabled
[] = "disabled";
105 u32 reg
= readl(HB_SREG_A9_PWRDOM_STAT
);
107 if (!(reg
& PWRDOM_STAT_SATA
))
108 do_fixup_by_compat(fdt
, "calxeda,hb-ahci", "status",
109 disabled
, sizeof(disabled
), 1);
111 if (!(reg
& PWRDOM_STAT_EMMC
))
112 do_fixup_by_compat(fdt
, "calxeda,hb-sdhci", "status",
113 disabled
, sizeof(disabled
), 1);
119 void reset_cpu(ulong addr
)
121 writel(HB_PWR_HARD_RESET
, HB_SREG_A9_PWR_REQ
);
122 writeb(HB_SCU_A9_PWR_OFF
, HB_SCU_A9_PWR_STATUS
);