board/impa7/memsetup.S

   1 /*
   2  * Memory Setup stuff - taken from ???
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22
  23
  24 #include <config.h>
  25 #include <version.h>
  26
  27
  28 /* some parameters for the board */
  29
  30 SYSCON2:        .long   0x80001100
  31 MEMCFG1:        .long   0x80000180
  32 MEMCFG2:        .long   0x800001C0
  33 DRFPR:          .long   0x80000200
  34
  35 syscon2_mask:   .long   0x00000004
  36 memcfg1_val:    .long   0x160c1414
  37 memcfg2_mask:   .long   0x0000ffff @ only set lower 16 bits
  38 memcfg2_val:    .long   0x00000000 @ upper 16 bits are reserved for CS7 + CS6
  39 drfpr_val:      .long   0x00000081
  40 /* setting up the memory */
  41
  42 .globl memsetup
  43 memsetup:
  44         /*
  45          * DRFPR
  46          * 64kHz DRAM refresh
  47          */
  48         ldr     r0, DRFPR
  49         ldr     r1, drfpr_val
  50         str     r1, [r0]
  51
  52         /*
  53          * SYSCON2: clear bit 2, DRAM is 32 bits wide
  54          */
  55         ldr     r0, SYSCON2
  56         ldr     r2, [r0]
  57         ldr     r1, syscon2_mask
  58         bic     r2, r2, r1
  59         str     r2, [r0]
  60
  61         /*
  62          * MEMCFG1
  63          * Setting up Keyboard at CS3, 8 Bit, 3 Waitstates
  64          * Setting up CS8900 (Ethernet) at CS2, 32 Bit, 5 Waitstates
  65          * Setting up flash at CS0 and CS1, 32 Bit, 3 Waitstates
  66          */
  67         ldr     r0, MEMCFG1
  68         ldr     r1, memcfg1_val
  69         str     r1, [r0]
  70
  71         /*
  72          * MEMCFG2
  73          * Setting up ? with 0
  74          *
  75          */
  76         ldr     r0, MEMCFG2
  77         ldr     r2, [r0]
  78         ldr     r1, memcfg2_mask
  79         bic     r2, r2, r1
  80         ldr     r1, memcfg2_val
  81         orr     r2, r2, r1
  82         str     r2, [r0]
  83
  84         /* everything is fine now */
  85         mov     pc, lr