board/integratorcp/integratorcp.c

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  *
   6  * (C) Copyright 2002
   7  * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
   8  *
   9  * (C) Copyright 2003
  10  * Texas Instruments, <www.ti.com>
  11  * Kshitij Gupta <Kshitij@ti.com>
  12  *
  13  * (C) Copyright 2004
  14  * ARM Ltd.
  15  * Philippe Robin, <philippe.robin@arm.com>
  16  *
  17  * See file CREDITS for list of people who contributed to this
  18  * project.
  19  *
  20  * This program is free software; you can redistribute it and/or
  21  * modify it under the terms of the GNU General Public License as
  22  * published by the Free Software Foundation; either version 2 of
  23  * the License, or (at your option) any later version.
  24  *
  25  * This program is distributed in the hope that it will be useful,
  26  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  27  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  28  * GNU General Public License for more details.
  29  *
  30  * You should have received a copy of the GNU General Public License
  31  * along with this program; if not, write to the Free Software
  32  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  33  * MA 02111-1307 USA
  34  */
  35
  36 #include <common.h>
  37
  38 void flash__init (void);
  39 void ether__init (void);
  40 void peripheral_power_enable (void);
  41
  42 #if defined(CONFIG_SHOW_BOOT_PROGRESS)
  43 void show_boot_progress(int progress)
  44 {
  45         printf("Boot reached stage %d\n", progress);
  46 }
  47 #endif
  48
  49 #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
  50
  51 /*
  52  * Miscellaneous platform dependent initialisations
  53  */
  54
  55 int board_init (void)
  56 {
  57         DECLARE_GLOBAL_DATA_PTR;
  58
  59         /* arch number of Integrator Board */
  60         gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
  61
  62         /* adress of boot parameters */
  63         gd->bd->bi_boot_params = 0x00000100;
  64
  65         gd->flags = 0;
  66
  67 #ifdef CONFIG_CM_REMAP
  68 extern void cm_remap(void);
  69         cm_remap();     /* remaps writeable memory to 0x00000000 */
  70 #endif
  71
  72         icache_enable ();
  73
  74         flash__init ();
  75         ether__init ();
  76         return 0;
  77 }
  78
  79
  80 int misc_init_r (void)
  81 {
  82         setenv("verify", "n");
  83         return (0);
  84 }
  85
  86 /******************************
  87  Routine:
  88  Description:
  89 ******************************/
  90 void flash__init (void)
  91 {
  92 }
  93 /*************************************************************
  94  Routine:ether__init
  95  Description: take the Ethernet controller out of reset and wait
  96               for the EEPROM load to complete.
  97 *************************************************************/
  98 void ether__init (void)
  99 {
 100 }
 101
 102 /******************************
 103  Routine:
 104  Description:
 105 ******************************/
 106 int dram_init (void)
 107 {
 108         DECLARE_GLOBAL_DATA_PTR;
 109
 110         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 111         gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
 112
 113 #ifdef CONFIG_CM_SPD_DETECT
 114     {
 115 extern void dram_query(void);
 116         unsigned long cm_reg_sdram;
 117         unsigned long sdram_shift;
 118
 119         dram_query();   /* Assembler accesses to CM registers */
 120                         /* Queries the SPD values             */
 121
 122         /* Obtain the SDRAM size from the CM SDRAM register */
 123
 124         cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
 125         /*   Register         SDRAM size
 126          *
 127          *   0xXXXXXXbbb000bb    16 MB
 128          *   0xXXXXXXbbb001bb    32 MB
 129          *   0xXXXXXXbbb010bb    64 MB
 130          *   0xXXXXXXbbb011bb   128 MB
 131          *   0xXXXXXXbbb100bb   256 MB
 132          *
 133          */
 134         sdram_shift              = ((cm_reg_sdram & 0x0000001C)/4)%4;
 135         gd->bd->bi_dram[0].size  = 0x01000000 << sdram_shift;
 136
 137     }
 138 #endif /* CM_SPD_DETECT */
 139
 140         return 0;
 141 }
 142
 143 /* The Integrator/CP timer1 is clocked at 1MHz
 144  * can be divided by 16 or 256
 145  * and can be set up as a 32-bit timer
 146  */
 147 /* U-Boot expects a 32 bit timer, running at CFG_HZ */
 148 /* Keep total timer count to avoid losing decrements < div_timer */
 149 static unsigned long long total_count = 0;
 150 static unsigned long long lastdec;       /* Timer reading at last call     */
 151 static unsigned long long div_clock = 1; /* Divisor applied to timer clock */
 152 static unsigned long long div_timer = 1; /* Divisor to convert timer reading
 153                                           * change to U-Boot ticks
 154                                           */
 155 /* CFG_HZ = CFG_HZ_CLOCK/(div_clock * div_timer) */
 156 static ulong timestamp;         /* U-Boot ticks since startup         */
 157
 158 #define TIMER_LOAD_VAL ((ulong)0xFFFFFFFF)
 159 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
 160
 161 /* all function return values in U-Boot ticks i.e. (1/CFG_HZ) sec
 162  *  - unless otherwise stated
 163  */
 164
 165 /* starts up a counter
 166  * - the Integrator/CP timer can be set up to issue an interrupt */
 167 int interrupt_init (void)
 168 {
 169         /* Load timer with initial value */
 170         *(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
 171         /* Set timer to be
 172          *      enabled           1
 173          *      periodic          1
 174          *      no interrupts     0
 175          *      X                 0
 176          *      divider 1        00 == less rounding error
 177          *      32 bit            1
 178          *      wrapping          0
 179          */
 180         *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x000000C2;
 181         /* init the timestamp */
 182         total_count = 0ULL;
 183         reset_timer_masked();
 184
 185         div_timer  = (unsigned long long)(CFG_HZ_CLOCK / CFG_HZ);
 186         div_timer /= div_clock;
 187
 188         return (0);
 189 }
 190
 191 /*
 192  * timer without interrupts
 193  */
 194 void reset_timer (void)
 195 {
 196         reset_timer_masked ();
 197 }
 198
 199 ulong get_timer (ulong base_ticks)
 200 {
 201         return get_timer_masked () - base_ticks;
 202 }
 203
 204 void set_timer (ulong ticks)
 205 {
 206         timestamp   = ticks;
 207         total_count = (unsigned long long)ticks * div_timer;
 208 }
 209
 210 /* delay usec useconds */
 211 void udelay (unsigned long usec)
 212 {
 213         ulong tmo, tmp;
 214
 215         /* Convert to U-Boot ticks */
 216         tmo  = usec * CFG_HZ;
 217         tmo /= (1000000L);
 218
 219         tmp  = get_timer_masked();      /* get current timestamp */
 220         tmo += tmp;                     /* form target timestamp */
 221
 222         while (get_timer_masked () < tmo) {/* loop till event */
 223                 /*NOP*/;
 224         }
 225 }
 226
 227 void reset_timer_masked (void)
 228 {
 229         /* capure current decrementer value    */
 230         lastdec   = (unsigned long long)READ_TIMER;
 231         /* start "advancing" time stamp from 0 */
 232         timestamp = 0L;
 233 }
 234
 235 /* converts the timer reading to U-Boot ticks          */
 236 /* the timestamp is the number of ticks since reset    */
 237 ulong get_timer_masked (void)
 238 {
 239         /* get current count */
 240         unsigned long long now = (unsigned long long)READ_TIMER;
 241
 242         if(now > lastdec) {
 243                 /* Must have wrapped */
 244                 total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
 245         } else {
 246                 total_count += lastdec - now;
 247         }
 248         lastdec   = now;
 249         timestamp = (ulong)(total_count/div_timer);
 250
 251         return timestamp;
 252 }
 253
 254 /* waits specified delay value and resets timestamp */
 255 void udelay_masked (unsigned long usec)
 256 {
 257         udelay(usec);
 258 }
 259
 260 /*
 261  * This function is derived from PowerPC code (read timebase as long long).
 262  * On ARM it just returns the timer value.
 263  */
 264 unsigned long long get_ticks(void)
 265 {
 266         return (unsigned long long)get_timer(0);
 267 }
 268
 269 /*
 270  * Return the timebase clock frequency
 271  * i.e. how often the timer decrements
 272  */
 273 ulong get_tbclk (void)
 274 {
 275         return (ulong)(((unsigned long long)CFG_HZ_CLOCK)/div_clock);
 276 }