2 * Board functions for IGEP COM AQUILA/CYGNUS based boards
4 * Copyright (C) 2013, ISEE 2007 SL - http://www.isee.biz/
6 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/cpu.h>
13 #include <asm/arch/hardware.h>
14 #include <asm/arch/omap.h>
15 #include <asm/arch/ddr_defs.h>
16 #include <asm/arch/clock.h>
17 #include <asm/arch/gpio.h>
18 #include <asm/arch/mmc_host_def.h>
19 #include <asm/arch/sys_proto.h>
28 DECLARE_GLOBAL_DATA_PTR
;
30 static struct wd_timer
*wdtimer
= (struct wd_timer
*)WDT_BASE
;
32 /* MII mode defines */
33 #define RMII_MODE_ENABLE 0x4D
35 static struct ctrl_dev
*cdev
= (struct ctrl_dev
*)CTRL_DEVICE_BASE
;
37 #ifdef CONFIG_SPL_BUILD
38 static const struct ddr_data ddr3_data
= {
39 .datardsratio0
= K4B2G1646EBIH9_RD_DQS
,
40 .datawdsratio0
= K4B2G1646EBIH9_WR_DQS
,
41 .datafwsratio0
= K4B2G1646EBIH9_PHY_FIFO_WE
,
42 .datawrsratio0
= K4B2G1646EBIH9_PHY_WR_DATA
,
43 .datadldiff0
= PHY_DLL_LOCK_DIFF
,
46 static const struct cmd_control ddr3_cmd_ctrl_data
= {
47 .cmd0csratio
= K4B2G1646EBIH9_RATIO
,
48 .cmd0dldiff
= K4B2G1646EBIH9_DLL_LOCK_DIFF
,
49 .cmd0iclkout
= K4B2G1646EBIH9_INVERT_CLKOUT
,
51 .cmd1csratio
= K4B2G1646EBIH9_RATIO
,
52 .cmd1dldiff
= K4B2G1646EBIH9_DLL_LOCK_DIFF
,
53 .cmd1iclkout
= K4B2G1646EBIH9_INVERT_CLKOUT
,
55 .cmd2csratio
= K4B2G1646EBIH9_RATIO
,
56 .cmd2dldiff
= K4B2G1646EBIH9_DLL_LOCK_DIFF
,
57 .cmd2iclkout
= K4B2G1646EBIH9_INVERT_CLKOUT
,
60 static struct emif_regs ddr3_emif_reg_data
= {
61 .sdram_config
= K4B2G1646EBIH9_EMIF_SDCFG
,
62 .ref_ctrl
= K4B2G1646EBIH9_EMIF_SDREF
,
63 .sdram_tim1
= K4B2G1646EBIH9_EMIF_TIM1
,
64 .sdram_tim2
= K4B2G1646EBIH9_EMIF_TIM2
,
65 .sdram_tim3
= K4B2G1646EBIH9_EMIF_TIM3
,
66 .zq_config
= K4B2G1646EBIH9_ZQ_CFG
,
67 .emif_ddr_phy_ctlr_1
= K4B2G1646EBIH9_EMIF_READ_LATENCY
,
72 * Early system init of muxing and clocks.
77 * Save the boot parameters passed from romcode.
78 * We cannot delay the saving further than this,
79 * to prevent overwrites.
81 #ifdef CONFIG_SPL_BUILD
82 save_omap_boot_params();
85 /* WDT1 is already running when the bootloader gets control
86 * Disable it to avoid "random" resets
88 writel(0xAAAA, &wdtimer
->wdtwspr
);
89 while (readl(&wdtimer
->wdtwwps
) != 0x0)
91 writel(0x5555, &wdtimer
->wdtwspr
);
92 while (readl(&wdtimer
->wdtwwps
) != 0x0)
95 #ifdef CONFIG_SPL_BUILD
96 /* Setup the PLLs and the clocks for the peripherals */
99 /* Enable RTC32K clock */
102 enable_uart0_pin_mux();
107 preloader_console_init();
109 /* Configure board pin mux */
110 enable_board_pin_mux();
112 config_ddr(303, K4B2G1646EBIH9_IOCTRL_VALUE
, &ddr3_data
,
113 &ddr3_cmd_ctrl_data
, &ddr3_emif_reg_data
, 0);
118 * Basic board specific setup. Pinmux has been handled already.
122 gd
->bd
->bi_boot_params
= PHYS_DRAM_1
+ 0x100;
129 #if defined(CONFIG_DRIVER_TI_CPSW)
130 static void cpsw_control(int enabled
)
132 /* VTP can be added here */
137 static struct cpsw_slave_data cpsw_slaves
[] = {
139 .slave_reg_ofs
= 0x208,
140 .sliver_reg_ofs
= 0xd80,
142 .phy_if
= PHY_INTERFACE_MODE_RMII
,
146 static struct cpsw_platform_data cpsw_data
= {
147 .mdio_base
= CPSW_MDIO_BASE
,
148 .cpsw_base
= CPSW_BASE
,
151 .cpdma_reg_ofs
= 0x800,
153 .slave_data
= cpsw_slaves
,
154 .ale_reg_ofs
= 0xd00,
156 .host_port_reg_ofs
= 0x108,
157 .hw_stats_reg_ofs
= 0x900,
158 .mac_control
= (1 << 5),
159 .control
= cpsw_control
,
161 .version
= CPSW_CTRL_VERSION_2
,
164 int board_eth_init(bd_t
*bis
)
168 uint32_t mac_hi
, mac_lo
;
170 if (!eth_getenv_enetaddr("ethaddr", mac_addr
)) {
171 /* try reading mac address from efuse */
172 mac_lo
= readl(&cdev
->macid0l
);
173 mac_hi
= readl(&cdev
->macid0h
);
174 mac_addr
[0] = mac_hi
& 0xFF;
175 mac_addr
[1] = (mac_hi
& 0xFF00) >> 8;
176 mac_addr
[2] = (mac_hi
& 0xFF0000) >> 16;
177 mac_addr
[3] = (mac_hi
& 0xFF000000) >> 24;
178 mac_addr
[4] = mac_lo
& 0xFF;
179 mac_addr
[5] = (mac_lo
& 0xFF00) >> 8;
180 if (is_valid_ether_addr(mac_addr
))
181 eth_setenv_enetaddr("ethaddr", mac_addr
);
184 writel(RMII_MODE_ENABLE
, &cdev
->miisel
);
186 rv
= cpsw_register(&cpsw_data
);
188 printf("Error %d registering CPSW switch\n", rv
);