board/isee/igep003x/mux.c

   1 /*
   2  * Copyright (C) 2013, ISEE 2007 SL - http://www.isee.biz/
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License as
   6  * published by the Free Software Foundation version 2.
   7  *
   8  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
   9  * kind, whether express or implied; without even the implied warranty
  10  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include <common.h>
  15 #include <asm/arch/sys_proto.h>
  16 #include <asm/arch/hardware.h>
  17 #include <asm/arch/mux.h>
  18 #include <asm/io.h>
  19 #include <i2c.h>
  20 #include "board.h"
  21
  22 static struct module_pin_mux uart0_pin_mux[] = {
  23         {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},  /* UART0_RXD */
  24         {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},              /* UART0_TXD */
  25         {-1},
  26 };
  27
  28 static struct module_pin_mux mmc0_pin_mux[] = {
  29         {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)},  /* MMC0_DAT3 */
  30         {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)},  /* MMC0_DAT2 */
  31         {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)},  /* MMC0_DAT1 */
  32         {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)},  /* MMC0_DAT0 */
  33         {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)},   /* MMC0_CLK */
  34         {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)},   /* MMC0_CMD */
  35         {OFFSET(mcasp0_aclkx), (MODE(4) | RXACTIVE)},           /* MMC0_CD */
  36         {-1},
  37 };
  38
  39 static struct module_pin_mux nand_pin_mux[] = {
  40         {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD0 */
  41         {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD1 */
  42         {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD2 */
  43         {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD3 */
  44         {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD4 */
  45         {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD5 */
  46         {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD6 */
  47         {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD7 */
  48         {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */
  49         {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)},   /* NAND_WPN */
  50         {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)},              /* NAND_CS0 */
  51         {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)},  /* NAND_ADV_ALE */
  52         {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)},   /* NAND_OE */
  53         {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)},       /* NAND_WEN */
  54         {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)},  /* NAND_BE_CLE */
  55         {-1},
  56 };
  57
  58 static struct module_pin_mux rmii1_pin_mux[] = {
  59         {OFFSET(mii1_txen), MODE(1)},                   /* RMII1_TXEN */
  60         {OFFSET(mii1_rxerr), MODE(1) | RXACTIVE},       /* RMII1_RXERR */
  61         {OFFSET(mii1_crs), MODE(1) | RXACTIVE},         /* RMII1_CRS_DV */
  62         {OFFSET(mii1_rxd0), MODE(1) | RXACTIVE},        /* RMII1_RXD0 */
  63         {OFFSET(mii1_rxd1), MODE(1) | RXACTIVE},        /* RMII1_RXD1 */
  64         {OFFSET(mii1_txd0), MODE(1)},                   /* RMII1_TXD0 */
  65         {OFFSET(mii1_txd1), MODE(1)},                   /* RMII1_TXD1 */
  66         {OFFSET(rmii1_refclk), MODE(0) | RXACTIVE},     /* RMII1_REF_CLK */
  67         {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},    /* MDIO_DATA */
  68         {OFFSET(mdio_clk), MODE(0) | PULLUP_EN},        /* MDIO_CLK */
  69         {-1},
  70 };
  71
  72 void enable_uart0_pin_mux(void)
  73 {
  74         configure_module_pin_mux(uart0_pin_mux);
  75 }
  76
  77 /*
  78  * Do board-specific muxes.
  79  */
  80 void enable_board_pin_mux(void)
  81 {
  82         /* NAND Flash */
  83         configure_module_pin_mux(nand_pin_mux);
  84         /* SD Card */
  85         configure_module_pin_mux(mmc0_pin_mux);
  86         /* Ethernet pinmux. */
  87         configure_module_pin_mux(rmii1_pin_mux);
  88 }