board/keymile/km_arm/km_arm.c

   1 /*
   2  * (C) Copyright 2009
   3  * Marvell Semiconductor <www.marvell.com>
   4  * Prafulla Wadaskar <prafulla@marvell.com>
   5  *
   6  * (C) Copyright 2009
   7  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   8  *
   9  * (C) Copyright 2010
  10  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  11  *
  12  * See file CREDITS for list of people who contributed to this
  13  * project.
  14  *
  15  * This program is free software; you can redistribute it and/or
  16  * modify it under the terms of the GNU General Public License as
  17  * published by the Free Software Foundation; either version 2 of
  18  * the License, or (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; if not, write to the Free Software
  27  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  28  * MA 02110-1301 USA
  29  */
  30
  31 #include <common.h>
  32 #include <i2c.h>
  33 #include <nand.h>
  34 #include <netdev.h>
  35 #include <miiphy.h>
  36 #include <asm/io.h>
  37 #include <asm/arch/kirkwood.h>
  38 #include <asm/arch/mpp.h>
  39
  40 #include "../common/common.h"
  41
  42 DECLARE_GLOBAL_DATA_PTR;
  43
  44 static int      io_dev;
  45 extern I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf);
  46
  47 /* Multi-Purpose Pins Functionality configuration */
  48 u32 kwmpp_config[] = {
  49         MPP0_NF_IO2,
  50         MPP1_NF_IO3,
  51         MPP2_NF_IO4,
  52         MPP3_NF_IO5,
  53         MPP4_NF_IO6,
  54         MPP5_NF_IO7,
  55         MPP6_SYSRST_OUTn,
  56         MPP7_PEX_RST_OUTn,
  57 #if defined(CONFIG_SOFT_I2C)
  58         MPP8_GPIO,              /* SDA */
  59         MPP9_GPIO,              /* SCL */
  60 #endif
  61 #if defined(CONFIG_HARD_I2C)
  62         MPP8_TW_SDA,
  63         MPP9_TW_SCK,
  64 #endif
  65         MPP10_UART0_TXD,
  66         MPP11_UART0_RXD,
  67         MPP12_GPO,              /* Reserved */
  68         MPP13_UART1_TXD,
  69         MPP14_UART1_RXD,
  70         MPP15_GPIO,             /* Not used */
  71         MPP16_GPIO,             /* Not used */
  72         MPP17_GPIO,             /* Reserved */
  73         MPP18_NF_IO0,
  74         MPP19_NF_IO1,
  75         MPP20_GPIO,
  76         MPP21_GPIO,
  77         MPP22_GPIO,
  78         MPP23_GPIO,
  79         MPP24_GPIO,
  80         MPP25_GPIO,
  81         MPP26_GPIO,
  82         MPP27_GPIO,
  83         MPP28_GPIO,
  84         MPP29_GPIO,
  85         MPP30_GPIO,
  86         MPP31_GPIO,
  87         MPP32_GPIO,
  88         MPP33_GPIO,
  89         MPP34_GPIO,             /* CDL1 (input) */
  90         MPP35_GPIO,             /* CDL2 (input) */
  91         MPP36_GPIO,             /* MAIN_IRQ (input) */
  92         MPP37_GPIO,             /* BOARD_LED */
  93         MPP38_GPIO,             /* Piggy3 LED[1] */
  94         MPP39_GPIO,             /* Piggy3 LED[2] */
  95         MPP40_GPIO,             /* Piggy3 LED[3] */
  96         MPP41_GPIO,             /* Piggy3 LED[4] */
  97         MPP42_GPIO,             /* Piggy3 LED[5] */
  98         MPP43_GPIO,             /* Piggy3 LED[6] */
  99         MPP44_GPIO,             /* Piggy3 LED[7] */
 100         MPP45_GPIO,             /* Piggy3 LED[8] */
 101         MPP46_GPIO,             /* Reserved */
 102         MPP47_GPIO,             /* Reserved */
 103         MPP48_GPIO,             /* Reserved */
 104         MPP49_GPIO,             /* SW_INTOUTn */
 105         0
 106 };
 107
 108 int ethernet_present(void)
 109 {
 110         uchar   buf;
 111         int     ret = 0;
 112
 113         if (i2c_read(0x10, 2, 1, &buf, 1) != 0) {
 114                 printf ("%s: Error reading Boco\n", __FUNCTION__);
 115                 return -1;
 116         }
 117         if ((buf & 0x40) == 0x40) {
 118                 ret = 1;
 119         }
 120         return ret;
 121 }
 122
 123 int misc_init_r(void)
 124 {
 125         I2C_MUX_DEVICE  *i2cdev;
 126         char *str;
 127         int mach_type;
 128
 129         /* add I2C Bus for I/O Expander */
 130         i2cdev = i2c_mux_ident_muxstring((uchar *)"pca9554a:70:a");
 131         io_dev = i2cdev->busid;
 132         puts("Piggy:");
 133         if (ethernet_present() == 0)
 134                 puts (" not");
 135         puts(" present\n");
 136
 137         str = getenv("mach_type");
 138         if (str != NULL) {
 139                 mach_type = simple_strtoul(str, NULL, 10);
 140                 printf("Overwriting MACH_TYPE with %d!!!\n", mach_type);
 141                 gd->bd->bi_arch_number = mach_type;
 142         }
 143         return 0;
 144 }
 145
 146 int board_init(void)
 147 {
 148         u32 tmp;
 149
 150         kirkwood_mpp_conf(kwmpp_config);
 151
 152         /*
 153          * The FLASH_GPIO_PIN switches between using a
 154          * NAND or a SPI FLASH. Set this pin on start
 155          * to NAND mode.
 156          */
 157         tmp = readl(KW_GPIO0_BASE);
 158         writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
 159         tmp = readl(KW_GPIO0_BASE + 4);
 160         writel(tmp & (~FLASH_GPIO_PIN) , KW_GPIO0_BASE + 4);
 161         printf("KM: setting NAND mode\n");
 162
 163         /*
 164          * arch number of board
 165          */
 166         gd->bd->bi_arch_number = MACH_TYPE_SUEN3;
 167
 168         /* address of boot parameters */
 169         gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
 170
 171 #if defined(CONFIG_SOFT_I2C)
 172         /* init the GPIO for I2C Bitbang driver */
 173         kw_gpio_set_valid(SUEN3_SDA_PIN, 1);
 174         kw_gpio_set_valid(SUEN3_SCL_PIN, 1);
 175         kw_gpio_direction_output(SUEN3_SDA_PIN, 0);
 176         kw_gpio_direction_output(SUEN3_SCL_PIN, 0);
 177 #endif
 178 #if defined(CONFIG_SYS_EEPROM_WREN)
 179         kw_gpio_set_valid(SUEN3_ENV_WP, 38);
 180         kw_gpio_direction_output(SUEN3_ENV_WP, 1);
 181 #endif
 182         return 0;
 183 }
 184
 185 #if defined(CONFIG_CMD_SF)
 186 int do_spi_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 187 {
 188         u32 tmp;
 189         if (argc < 2) {
 190                 cmd_usage(cmdtp);
 191                 return 1;
 192         }
 193
 194         if ((strcmp(argv[1], "off") == 0)) {
 195                 printf("SPI FLASH disabled, NAND enabled\n");
 196                 /* Multi-Purpose Pins Functionality configuration */
 197                 kwmpp_config[0] = MPP0_NF_IO2;
 198                 kwmpp_config[1] = MPP1_NF_IO3;
 199                 kwmpp_config[2] = MPP2_NF_IO4;
 200                 kwmpp_config[3] = MPP3_NF_IO5;
 201
 202                 kirkwood_mpp_conf(kwmpp_config);
 203                 tmp = readl(KW_GPIO0_BASE);
 204                 writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
 205         } else if ((strcmp(argv[1], "on") == 0)) {
 206                 printf("SPI FLASH enabled, NAND disabled\n");
 207                 /* Multi-Purpose Pins Functionality configuration */
 208                 kwmpp_config[0] = MPP0_SPI_SCn;
 209                 kwmpp_config[1] = MPP1_SPI_MOSI;
 210                 kwmpp_config[2] = MPP2_SPI_SCK;
 211                 kwmpp_config[3] = MPP3_SPI_MISO;
 212
 213                 kirkwood_mpp_conf(kwmpp_config);
 214                 tmp = readl(KW_GPIO0_BASE);
 215                 writel(tmp & (~FLASH_GPIO_PIN) , KW_GPIO0_BASE);
 216         } else {
 217                 cmd_usage(cmdtp);
 218                 return 1;
 219         }
 220
 221         return 0;
 222 }
 223
 224 U_BOOT_CMD(
 225         spitoggle,      2,      0,      do_spi_toggle,
 226         "En-/disable SPI FLASH access",
 227         "<on|off> - Enable (on) or disable (off) SPI FLASH access\n"
 228         );
 229 #endif
 230
 231 int dram_init(void)
 232 {
 233         int i;
 234
 235         for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 236                 gd->bd->bi_dram[i].start = kw_sdram_bar(i);
 237                 gd->bd->bi_dram[i].size = get_ram_size((long *)kw_sdram_bar(i),
 238                                                        kw_sdram_bs(i));
 239         }
 240         return 0;
 241 }
 242
 243 /* Configure and enable MV88E1118 PHY */
 244 void reset_phy(void)
 245 {
 246         char *name = "egiga0";
 247
 248         if (miiphy_set_current_dev(name))
 249                 return;
 250
 251         /* reset the phy */
 252         miiphy_reset(name, CONFIG_PHY_BASE_ADR);
 253 }
 254
 255 #if defined(CONFIG_HUSH_INIT_VAR)
 256 int hush_init_var (void)
 257 {
 258         ivm_read_eeprom ();
 259         return 0;
 260 }
 261 #endif
 262
 263 #if defined(CONFIG_BOOTCOUNT_LIMIT)
 264 void bootcount_store (ulong a)
 265 {
 266         volatile ulong *save_addr;
 267         volatile ulong size = 0;
 268         int i;
 269         for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 270                 size += gd->bd->bi_dram[i].size;
 271         }
 272         save_addr = (ulong*)(size - BOOTCOUNT_ADDR);
 273         writel(a, save_addr);
 274         writel(BOOTCOUNT_MAGIC, &save_addr[1]);
 275 }
 276
 277 ulong bootcount_load (void)
 278 {
 279         volatile ulong *save_addr;
 280         volatile ulong size = 0;
 281         int i;
 282         for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 283                 size += gd->bd->bi_dram[i].size;
 284         }
 285         save_addr = (ulong*)(size - BOOTCOUNT_ADDR);
 286         if (readl(&save_addr[1]) != BOOTCOUNT_MAGIC)
 287                 return 0;
 288         else
 289                 return readl(save_addr);
 290 }
 291 #endif
 292
 293 #if defined(CONFIG_SOFT_I2C)
 294 void set_sda (int state)
 295 {
 296         I2C_ACTIVE;
 297         I2C_SDA(state);
 298 }
 299
 300 void set_scl (int state)
 301 {
 302         I2C_SCL(state);
 303 }
 304
 305 int get_sda (void)
 306 {
 307         I2C_TRISTATE;
 308         return I2C_READ;
 309 }
 310
 311 int get_scl (void)
 312 {
 313         return (kw_gpio_get_value(SUEN3_SCL_PIN) ? 1 : 0);
 314 }
 315 #endif
 316
 317 #if defined(CONFIG_SYS_EEPROM_WREN)
 318 int eeprom_write_enable (unsigned dev_addr, int state)
 319 {
 320         kw_gpio_set_value(SUEN3_ENV_WP, !state);
 321
 322         return !kw_gpio_get_value(SUEN3_ENV_WP);
 323 }
 324 #endif