board/korat/init.S

   1 /*
   2  *
   3  * SPDX-License-Identifier:     GPL-2.0+
   4  */
   5
   6 #include <asm-offsets.h>
   7 #include <ppc_asm.tmpl>
   8 #include <asm/mmu.h>
   9 #include <config.h>
  10
  11 /**************************************************************************
  12  * TLB TABLE
  13  *
  14  * This table is used by the cpu boot code to setup the initial tlb
  15  * entries. Rather than make broad assumptions in the cpu source tree,
  16  * this table lets each board set things up however they like.
  17  *
  18  *  Pointer to the table is returned in r1
  19  *
  20  *************************************************************************/
  21     .section .bootpg,"ax"
  22     .globl tlbtab
  23
  24 tlbtab:
  25         tlbtab_start
  26
  27         /*
  28          * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
  29          * speed up boot process. It is patched after relocation to enable SA_I
  30          */
  31         tlbentry( 0xF0000000, SZ_256M, 0xF0000000, 1, AC_RWX | SA_G )
  32
  33         /*
  34          * TLB entries for SDRAM are not needed on this platform.  They are
  35          * generated dynamically in the SPD DDR2 detection routine.
  36          */
  37
  38 #ifdef CONFIG_SYS_INIT_RAM_DCACHE
  39         /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
  40         tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0,
  41                   AC_RWX | SA_G )
  42 #endif
  43
  44         /* TLB-entry for PCI Memory */
  45         tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x00000000, SZ_256M,
  46                   CONFIG_SYS_PCI_MEMBASE + 0x00000000, 1, AC_RW | SA_IG )
  47
  48         tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x10000000, SZ_256M,
  49                   CONFIG_SYS_PCI_MEMBASE + 0x10000000, 1, AC_RW | SA_IG )
  50
  51         tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x20000000, SZ_256M,
  52                   CONFIG_SYS_PCI_MEMBASE + 0x20000000, 1, AC_RW | SA_IG )
  53
  54         tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x30000000, SZ_256M,
  55                   CONFIG_SYS_PCI_MEMBASE + 0x30000000, 1, AC_RW | SA_IG )
  56
  57         /* TLB-entry for EBC */
  58         tlbentry( CONFIG_SYS_CPLD_BASE, SZ_1K, CONFIG_SYS_CPLD_BASE, 1, AC_RW | SA_IG )
  59
  60         /* TLB-entry for Internal Registers & OCM */
  61         /* I wonder why this must be executable -- lrj@acm.org 2007-10-08 */
  62         tlbentry( 0xE0000000, SZ_16M, 0xE0000000, 0, AC_RWX | SA_I )
  63
  64         /*TLB-entry PCI registers*/
  65         tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_RW | SA_IG )
  66
  67         /* TLB-entry for peripherals */
  68         tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_RW | SA_IG)
  69
  70         /* TLB-entry PCI IO Space - from sr@denx.de */
  71         tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_RW | SA_IG)
  72
  73         tlbtab_end
  74
  75 #if defined(CONFIG_KORAT_PERMANENT)
  76         .globl  korat_branch_absolute
  77 korat_branch_absolute:
  78         mtlr    r3
  79         blr
  80 #endif