board/matrix_vision/mvblx/mvblx.c

   1 /*
   2  * MATRIX VISION GmbH mvBlueLYNX-X
   3  *
   4  * Derived from Beagle and Overo
   5  *
   6  * (C) Copyright 2004-2008
   7  * Texas Instruments, <www.ti.com>
   8  *
   9  * Author :
  10  *      Sunil Kumar <sunilsaini05@gmail.com>
  11  *      Shashi Ranjan <shashiranjanmca05@gmail.com>
  12  *
  13  * Derived from Beagle Board and 3430 SDP code by
  14  *      Richard Woodruff <r-woodruff2@ti.com>
  15  *      Syed Mohammed Khasim <khasim@ti.com>
  16  *
  17  *
  18  * SPDX-License-Identifier:     GPL-2.0+
  19  */
  20 #include <common.h>
  21 #include <netdev.h>
  22 #include <twl4030.h>
  23 #include <asm/io.h>
  24 #include <asm/arch/mem.h>
  25 #include <asm/arch/mmc_host_def.h>
  26 #include <asm/arch/mux.h>
  27 #include <asm/arch/sys_proto.h>
  28 #include <asm/arch/gpio.h>
  29 #include <asm/mach-types.h>
  30 #include "mvblx.h"
  31 #include "fpga.h"
  32
  33 DECLARE_GLOBAL_DATA_PTR;
  34
  35 #if defined(CONFIG_CMD_NET)
  36 static void setup_net_chip(void);
  37 #endif /* CONFIG_CMD_NET */
  38
  39 /*
  40  * Routine: board_init
  41  * Description: Early hardware init.
  42  */
  43 int board_init(void)
  44 {
  45         gpmc_init();    /* in SRAM or SDRAM, finish GPMC */
  46         /* boot param addr */
  47         gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
  48
  49         return 0;
  50 }
  51
  52 /*
  53  * Routine: misc_init_r
  54  * Description: Configure board specific parts
  55  */
  56 int misc_init_r(void)
  57 {
  58         printf("mvBlueLYNX-X\n");
  59         if (get_cpu_family() == CPU_OMAP36XX)
  60                 setenv("mpurate", "1000");
  61         else
  62                 setenv("mpurate", "600");
  63
  64         twl4030_power_init();
  65
  66 #if defined(CONFIG_CMD_NET)
  67         setup_net_chip();
  68 #endif /* CONFIG_CMD_NET */
  69
  70         mvblx_init_fpga();
  71
  72         mac_read_from_eeprom();
  73
  74         dieid_num_r();
  75
  76         return 0;
  77 }
  78
  79 /*
  80  * Routine: set_muxconf_regs
  81  * Description: Setting up the configuration Mux registers specific to the
  82  *              hardware. Many pins need to be moved from protect to primary
  83  *              mode.
  84  */
  85 void set_muxconf_regs(void)
  86 {
  87         MUX_MVBLX();
  88 }
  89
  90 #ifdef CONFIG_GENERIC_MMC
  91 int board_mmc_init(bd_t *bis)
  92 {
  93         omap_mmc_init(0, 0, 0, -1, -1);
  94         omap_mmc_init(1, 0, 0, -1, -1);
  95         return 0;
  96 }
  97
  98 void board_mmc_power_init(void)
  99 {
 100         twl4030_power_mmc_init(0);
 101         twl4030_power_mmc_init(1);
 102 }
 103 #endif
 104
 105 #if defined(CONFIG_CMD_NET)
 106 /*
 107  * Routine: setup_net_chip
 108  * Description: Setting up the configuration GPMC registers specific to the
 109  *              Ethernet hardware.
 110  */
 111 static void setup_net_chip(void)
 112 {
 113         struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
 114         struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
 115
 116         /* Configure GPMC registers */
 117         writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[0].config1);
 118         writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[0].config2);
 119         writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[0].config3);
 120         writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[0].config4);
 121         writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[0].config5);
 122         writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[0].config6);
 123         writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[0].config7);
 124
 125         /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
 126         writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
 127         /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
 128         writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
 129         /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
 130         writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
 131                 &ctrl_base->gpmc_nadv_ale);
 132
 133         /* Make GPIO 139 as output pin */
 134         writel(readl(&gpio5_base->oe) & ~(GPIO11), &gpio5_base->oe);
 135
 136         /* Now send a pulse on the GPIO pin */
 137         writel(GPIO11, &gpio5_base->setdataout);
 138         udelay(1);
 139         writel(GPIO11, &gpio5_base->cleardataout);
 140         udelay(1);
 141         writel(GPIO11, &gpio5_base->setdataout);
 142 }
 143
 144 int board_eth_init(bd_t *bis)
 145 {
 146         int rc = 0;
 147 #ifdef CONFIG_SMC911X
 148         rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
 149 #endif
 150         return rc;
 151 }
 152
 153 int overwrite_console(void)
 154 {
 155         /* return true if console should be overwritten */
 156         return 0;
 157 }
 158
 159 #endif /* CONFIG_CMD_NET */