3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4 * Keith Outwater, keith_outwater@mvis.com.
7 * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
9 * SPDX-License-Identifier: GPL-2.0+
19 Xilinx_Spartan3_Slave_Serial_fns fpga_fns
= {
29 Xilinx_desc spartan3
= {
37 DECLARE_GLOBAL_DATA_PTR
;
39 int mvsmr_init_fpga(void)
42 fpga_add(fpga_xilinx
, &spartan3
);
47 int fpga_init_fn(int cookie
)
49 struct mpc5xxx_gpio
*gpio
= (struct mpc5xxx_gpio
*)MPC5XXX_GPIO
;
51 if (in_be32(&gpio
->simple_ival
) & FPGA_CONFIG
)
57 int fpga_done_fn(int cookie
)
59 struct mpc5xxx_gpio
*gpio
= (struct mpc5xxx_gpio
*)MPC5XXX_GPIO
;
63 if (in_be32(&gpio
->simple_ival
) & FPGA_DONE
)
69 int fpga_pgm_fn(int assert, int flush
, int cookie
)
71 struct mpc5xxx_gpio
*gpio
= (struct mpc5xxx_gpio
*)MPC5XXX_GPIO
;
74 setbits_8(&gpio
->sint_dvo
, FPGA_STATUS
);
76 clrbits_8(&gpio
->sint_dvo
, FPGA_STATUS
);
81 int fpga_clk_fn(int assert_clk
, int flush
, int cookie
)
83 struct mpc5xxx_gpio
*gpio
= (struct mpc5xxx_gpio
*)MPC5XXX_GPIO
;
86 setbits_be32(&gpio
->simple_dvo
, FPGA_CCLK
);
88 clrbits_be32(&gpio
->simple_dvo
, FPGA_CCLK
);
93 int fpga_wr_fn(int assert_write
, int flush
, int cookie
)
95 struct mpc5xxx_gpio
*gpio
= (struct mpc5xxx_gpio
*)MPC5XXX_GPIO
;
98 setbits_be32(&gpio
->simple_dvo
, FPGA_DIN
);
100 clrbits_be32(&gpio
->simple_dvo
, FPGA_DIN
);
105 int fpga_pre_config_fn(int cookie
)
107 struct mpc5xxx_gpio
*gpio
= (struct mpc5xxx_gpio
*)MPC5XXX_GPIO
;
109 setbits_8(&gpio
->sint_dvo
, FPGA_STATUS
);