board/mimc/mimc200/mimc200.c

   1 /*
   2  * Copyright (C) 2006 Atmel Corporation
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22 #include <common.h>
  23
  24 #include <asm/io.h>
  25 #include <asm/sdram.h>
  26 #include <asm/arch/clk.h>
  27 #include <asm/arch/gpio.h>
  28 #include <asm/arch/hmatrix.h>
  29 #include <asm/arch/portmux.h>
  30 #include <lcd.h>
  31
  32 #define SM_PM_GCCTRL                            0x0060
  33
  34 DECLARE_GLOBAL_DATA_PTR;
  35
  36 static const struct sdram_config sdram_config = {
  37         .data_bits      = SDRAM_DATA_16BIT,
  38         .row_bits       = 13,
  39         .col_bits       = 9,
  40         .bank_bits      = 2,
  41         .cas            = 3,
  42         .twr            = 2,
  43         .trc            = 6,
  44         .trp            = 2,
  45         .trcd           = 2,
  46         .tras           = 6,
  47         .txsr           = 6,
  48         /* 15.6 us */
  49         .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
  50 };
  51
  52 int board_early_init_f(void)
  53 {
  54         /* Enable SDRAM in the EBI mux */
  55         hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
  56
  57         /* Enable 26 address bits and NCS2 */
  58         portmux_enable_ebi(16, 26, PORTMUX_EBI_CS(2), PORTMUX_DRIVE_HIGH);
  59         portmux_enable_usart1(PORTMUX_DRIVE_MIN);
  60
  61         /* de-assert "force sys reset" pin */
  62         portmux_select_gpio(PORTMUX_PORT_D, 1 << 15,
  63                         PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH);
  64
  65         /* init custom i/o */
  66         /* cpu type inputs */
  67         portmux_select_gpio(PORTMUX_PORT_E, (1 << 19) | (1 << 20) | (1 << 23),
  68                         PORTMUX_DIR_INPUT);
  69         /* main board type inputs */
  70         portmux_select_gpio(PORTMUX_PORT_B, (1 << 19) | (1 << 29),
  71                         PORTMUX_DIR_INPUT);
  72         /* DEBUG input (use weak pullup) */
  73         portmux_select_gpio(PORTMUX_PORT_E, 1 << 21,
  74                         PORTMUX_DIR_INPUT | PORTMUX_PULL_UP);
  75
  76         /* are we suppressing the console ? */
  77         if (gpio_get_value(GPIO_PIN_PE(21)) == 1)
  78                 gd->flags |= GD_FLG_SILENT;
  79
  80         /* reset phys */
  81         portmux_select_gpio(PORTMUX_PORT_E, 1 << 24, PORTMUX_DIR_INPUT);
  82         portmux_select_gpio(PORTMUX_PORT_C, 1 << 18,
  83                         PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH);
  84
  85         /* GCLK0 - 10MHz clock */
  86         writel(0x00000004, (void *)SM_BASE + SM_PM_GCCTRL);
  87         portmux_select_peripheral(PORTMUX_PORT_A, 1 << 30, PORTMUX_FUNC_A, 0);
  88
  89         udelay(5000);
  90
  91         /* release phys reset */
  92         gpio_set_value(GPIO_PIN_PC(18), 0);     /* PHY RESET (Release)  */
  93
  94 #if defined(CONFIG_MACB)
  95         /* init macb0 pins */
  96         portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
  97         portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
  98 #endif
  99
 100 #if defined(CONFIG_MMC)
 101         portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
 102 #endif
 103
 104         return 0;
 105 }
 106
 107 phys_size_t initdram(int board_type)
 108 {
 109         unsigned long expected_size;
 110         unsigned long actual_size;
 111         void *sdram_base;
 112
 113         sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
 114
 115         expected_size = sdram_init(sdram_base, &sdram_config);
 116         actual_size = get_ram_size(sdram_base, expected_size);
 117
 118         unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
 119
 120         if (expected_size != actual_size)
 121                 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
 122                                 actual_size >> 20, expected_size >> 20);
 123
 124         return actual_size;
 125 }
 126
 127 void board_init_info(void)
 128 {
 129         gd->bd->bi_phy_id[0] = 0x01;
 130         gd->bd->bi_phy_id[1] = 0x03;
 131 }
 132
 133 /* SPI chip select control */
 134 #ifdef CONFIG_ATMEL_SPI
 135 #include <spi.h>
 136
 137 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 138 {
 139         return (bus == 0) && (cs == 0);
 140 }
 141
 142 void spi_cs_activate(struct spi_slave *slave)
 143 {
 144 }
 145
 146 void spi_cs_deactivate(struct spi_slave *slave)
 147 {
 148 }
 149 #endif /* CONFIG_ATMEL_SPI */
 150
 151 #ifdef CONFIG_CMD_NET
 152 extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
 153
 154 int board_eth_init(bd_t *bi)
 155 {
 156         macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
 157         macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
 158
 159         return 0;
 160 }
 161 #endif