board/mpl/common/isa.c

   1 /*
   2  * (C) Copyright 2001
   3  * Denis Peter, MPL AG Switzerland
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  *
  23  *
  24  * TODO: clean-up
  25  */
  26
  27 #include <common.h>
  28 #include <asm/processor.h>
  29 #include <devices.h>
  30 #include "isa.h"
  31 #include "piix4_pci.h"
  32 #include "kbd.h"
  33 #include "video.h"
  34
  35 extern int drv_isa_kbd_init (void);
  36
  37 #undef  ISA_DEBUG
  38
  39 #ifdef  ISA_DEBUG
  40 #define PRINTF(fmt,args...)     printf (fmt ,##args)
  41 #else
  42 #define PRINTF(fmt,args...)
  43 #endif
  44
  45 #ifndef TRUE
  46 #define TRUE            1
  47 #endif
  48 #ifndef FALSE
  49 #define FALSE           0
  50 #endif
  51
  52
  53 /* fdc (logical device 0) */
  54 const SIO_LOGDEV_TABLE sio_fdc[] = {
  55         {0x60, 3},                      /* set IO to FDPort (3F0) */
  56         {0x61, 0xF0},           /* set IO to FDPort (3F0) */
  57         {0x70, 06},                     /* set IRQ 6 for FDPort */
  58         {0x74, 02},                     /* set DMA 2 for FDPort */
  59         {0xF0, 0x05},           /* set to PS2 type */
  60         {0xF1, 0x00},     /* default value */
  61         {0x30, 1},                      /* and activate the device */
  62         {0xFF, 0}                               /* end of device table */
  63 };
  64 /* paralell port (logical device 3) */
  65 const SIO_LOGDEV_TABLE sio_pport[] = {
  66         {0x60, 3},                      /* set IO to PPort (378) */
  67         {0x61, 0x78},           /* set IO to PPort (378) */
  68         {0x70, 07},                     /* set IRQ 7 for PPort */
  69         {0xF1, 00},                     /* set PPort to normal */
  70         {0x30, 1},                      /* and activate the device */
  71         {0xFF, 0}                               /* end of device table */
  72 };
  73 /* paralell port (logical device 3) Floppy assigned to lpt */
  74 const SIO_LOGDEV_TABLE sio_pport_fdc[] = {
  75         {0x60, 3},                      /* set IO to PPort (378) */
  76         {0x61, 0x78},           /* set IO to PPort (378) */
  77         {0x70, 07},                     /* set IRQ 7 for PPort */
  78         {0xF1, 02},                     /* set PPort to Floppy */
  79         {0x30, 1},                      /* and activate the device */
  80         {0xFF, 0}                               /* end of device table */
  81 };
  82 /* uart 1 (logical device 4) */
  83 const SIO_LOGDEV_TABLE sio_com1[] = {
  84         {0x60, 3},                      /* set IO to COM1 (3F8) */
  85         {0x61, 0xF8},           /* set IO to COM1 (3F8) */
  86         {0x70, 04},                     /* set IRQ 4 for COM1 */
  87         {0x30, 1},                      /* and activate the device */
  88         {0xFF, 0}                               /* end of device table */
  89 };
  90 /* uart 2 (logical device 5) */
  91 const SIO_LOGDEV_TABLE sio_com2[] = {
  92         {0x60, 2},                      /* set IO to COM2 (2F8) */
  93         {0x61, 0xF8},           /* set IO to COM2 (2F8) */
  94         {0x70, 03},                     /* set IRQ 3 for COM2 */
  95         {0x30, 1},                      /* and activate the device */
  96         {0xFF, 0}                               /* end of device table */
  97 };
  98
  99 /* keyboard controller (logical device 7) */
 100 const SIO_LOGDEV_TABLE sio_keyboard[] = {
 101         {0x70, 1},                      /* set IRQ 1 for keyboard */
 102         {0x72, 12},                     /* set IRQ 12 for mouse */
 103         {0xF0, 0},                      /* disable Port92 (this is a PowerPC!!) */
 104         {0x30, 1},                      /* and activate the device */
 105         {0xFF, 0}                               /* end of device table */
 106 };
 107
 108
 109 /*******************************************************************************
 110 * Config SuperIO FDC37C672
 111 ********************************************************************************/
 112 unsigned char open_cfg_super_IO(int address)
 113 {
 114         out8(CFG_ISA_IO_BASE_ADDRESS | address,0x55); /* open config */
 115         out8(CFG_ISA_IO_BASE_ADDRESS | address,0x20); /* set address to DEV ID */
 116         if(in8(CFG_ISA_IO_BASE_ADDRESS | address | 0x1)==0x40) /* ok Device ID is correct */
 117                 return TRUE;
 118         else
 119                 return FALSE;
 120 }
 121
 122 void close_cfg_super_IO(int address)
 123 {
 124         out8(CFG_ISA_IO_BASE_ADDRESS | address,0xAA); /* close config */
 125 }
 126
 127
 128 unsigned char read_cfg_super_IO(int address, unsigned char function, unsigned char regaddr)
 129 {
 130         /* assuming config reg is open */
 131         out8(CFG_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */
 132         out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */
 133         out8(CFG_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */
 134         return in8(CFG_ISA_IO_BASE_ADDRESS | address | 1);
 135 }
 136
 137 void write_cfg_super_IO(int address, unsigned char function, unsigned char regaddr, unsigned char data)
 138 {
 139         /* assuming config reg is open */
 140         out8(CFG_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */
 141         out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */
 142         out8(CFG_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */
 143         out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,data); /* writes the data */
 144 }
 145
 146 void isa_write_table(SIO_LOGDEV_TABLE *ldt,unsigned char ldev)
 147 {
 148         while (ldt->index != 0xFF) {
 149                 write_cfg_super_IO(SIO_CFG_PORT, ldev, ldt->index, ldt->val);
 150                 ldt++;
 151         } /* endwhile */
 152 }
 153
 154 void isa_sio_loadtable(void)
 155 {
 156         unsigned char *s = getenv("floppy");
 157         /* setup Floppy device 0*/
 158         isa_write_table((SIO_LOGDEV_TABLE *)&sio_fdc,0);
 159         /* setup parallel port device 3 */
 160         if(s && !strncmp(s, "lpt", 3)) {
 161                 printf("SIO:   Floppy assigned to LPT\n");
 162                 /* floppy is assigned to the LPT */
 163                 isa_write_table((SIO_LOGDEV_TABLE *)&sio_pport_fdc,3);
 164         }
 165         else {
 166                 /*printf("Floppy assigned to internal port\n");*/
 167                 isa_write_table((SIO_LOGDEV_TABLE *)&sio_pport,3);
 168         }
 169         /* setup Com1 port device 4 */
 170         isa_write_table((SIO_LOGDEV_TABLE *)&sio_com1,4);
 171         /* setup Com2 port device 5 */
 172         isa_write_table((SIO_LOGDEV_TABLE *)&sio_com2,5);
 173         /* setup keyboards device 7 */
 174         isa_write_table((SIO_LOGDEV_TABLE *)&sio_keyboard,7);
 175 }
 176
 177
 178 void isa_sio_setup(void)
 179 {
 180         if(open_cfg_super_IO(SIO_CFG_PORT)==TRUE)
 181         {
 182                 isa_sio_loadtable();
 183                 close_cfg_super_IO(0x3F0);
 184         }
 185 }
 186
 187
 188 /******************************************************************************
 189  * IRQ Controller
 190  * we use the Vector mode
 191  */
 192
 193 struct  isa_irq_action {
 194          interrupt_handler_t *handler;
 195          void *arg;
 196          int count;
 197 };
 198
 199 static struct isa_irq_action isa_irqs[16];
 200
 201
 202 /*
 203  * This contains the irq mask for both 8259A irq controllers,
 204  */
 205 static unsigned int cached_irq_mask = 0xffff;
 206
 207 #define cached_imr1     (unsigned char)cached_irq_mask
 208 #define cached_imr2     (unsigned char)(cached_irq_mask>>8)
 209 #define IMR_1           CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_OCW1
 210 #define IMR_2           CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_OCW1
 211 #define ICW1_1  CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW1
 212 #define ICW1_2  CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW1
 213 #define ICW2_1  CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW2
 214 #define ICW2_2  CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW2
 215 #define ICW3_1  ICW2_1
 216 #define ICW3_2  ICW2_2
 217 #define ICW4_1  ICW2_1
 218 #define ICW4_2  ICW2_2
 219 #define ISR_1           ICW1_1
 220 #define ISR_2           ICW1_2
 221
 222
 223 void disable_8259A_irq(unsigned int irq)
 224 {
 225         unsigned int mask = 1 << irq;
 226
 227         cached_irq_mask |= mask;
 228         if (irq & 8)
 229                 out8(IMR_2,cached_imr2);
 230         else
 231                 out8(IMR_1,cached_imr1);
 232 }
 233
 234 void enable_8259A_irq(unsigned int irq)
 235 {
 236         unsigned int mask = ~(1 << irq);
 237
 238         cached_irq_mask &= mask;
 239         if (irq & 8)
 240                 out8(IMR_2,cached_imr2);
 241         else
 242                 out8(IMR_1,cached_imr1);
 243 }
 244 /*
 245 int i8259A_irq_pending(unsigned int irq)
 246 {
 247         unsigned int mask = 1<<irq;
 248         int ret;
 249
 250         if (irq < 8)
 251                 ret = inb(0x20) & mask;
 252         else
 253                 ret = inb(0xA0) & (mask >> 8);
 254         spin_unlock_irqrestore(&i8259A_lock, flags);
 255
 256         return ret;
 257 }
 258 */
 259
 260 /*
 261  * This function assumes to be called rarely. Switching between
 262  * 8259A registers is slow.
 263  */
 264 int i8259A_irq_real(unsigned int irq)
 265 {
 266         int value;
 267         int irqmask = 1<<irq;
 268
 269         if (irq < 8) {
 270                 out8(ISR_1,0x0B);               /* ISR register */
 271                 value = in8(ISR_1) & irqmask;
 272                 out8(ISR_1,0x0A);               /* back to the IRR register */
 273                 return value;
 274         }
 275         out8(ISR_2,0x0B);               /* ISR register */
 276         value = in8(ISR_2) & (irqmask >> 8);
 277         out8(ISR_2,0x0A);               /* back to the IRR register */
 278         return value;
 279 }
 280
 281 /*
 282  * Careful! The 8259A is a fragile beast, it pretty
 283  * much _has_ to be done exactly like this (mask it
 284  * first, _then_ send the EOI, and the order of EOI
 285  * to the two 8259s is important!
 286  */
 287 void mask_and_ack_8259A(unsigned int irq)
 288 {
 289         unsigned int irqmask = 1 << irq;
 290         unsigned int temp_irqmask = cached_irq_mask;
 291         /*
 292          * Lightweight spurious IRQ detection. We do not want
 293          * to overdo spurious IRQ handling - it's usually a sign
 294          * of hardware problems, so we only do the checks we can
 295          * do without slowing down good hardware unnecesserily.
 296          *
 297          * Note that IRQ7 and IRQ15 (the two spurious IRQs
 298          * usually resulting from the 8259A-1|2 PICs) occur
 299          * even if the IRQ is masked in the 8259A. Thus we
 300          * can check spurious 8259A IRQs without doing the
 301          * quite slow i8259A_irq_real() call for every IRQ.
 302          * This does not cover 100% of spurious interrupts,
 303          * but should be enough to warn the user that there
 304          * is something bad going on ...
 305          */
 306         if (temp_irqmask & irqmask)
 307                 goto spurious_8259A_irq;
 308         temp_irqmask |= irqmask;
 309
 310 handle_real_irq:
 311         if (irq & 8) {
 312                 in8(IMR_2);             /* DUMMY - (do we need this?) */
 313                 out8(IMR_2,(unsigned char)(temp_irqmask>>8));
 314                 out8(ISR_2,0x60+(irq&7));/* 'Specific EOI' to slave */
 315                 out8(ISR_1,0x62);       /* 'Specific EOI' to master-IRQ2 */
 316                 out8(IMR_2,cached_imr2); /* turn it on again */
 317         } else {
 318                 in8(IMR_1);             /* DUMMY - (do we need this?) */
 319                 out8(IMR_1,(unsigned char)temp_irqmask);
 320                 out8(ISR_1,0x60+irq);   /* 'Specific EOI' to master */
 321                 out8(IMR_1,cached_imr1); /* turn it on again */
 322         }
 323
 324         return;
 325
 326 spurious_8259A_irq:
 327         /*
 328          * this is the slow path - should happen rarely.
 329          */
 330         if (i8259A_irq_real(irq))
 331                 /*
 332                  * oops, the IRQ _is_ in service according to the
 333                  * 8259A - not spurious, go handle it.
 334                  */
 335                 goto handle_real_irq;
 336
 337         {
 338                 static int spurious_irq_mask;
 339                 /*
 340                  * At this point we can be sure the IRQ is spurious,
 341                  * lets ACK and report it. [once per IRQ]
 342                  */
 343                 if (!(spurious_irq_mask & irqmask)) {
 344                         PRINTF("spurious 8259A interrupt: IRQ%d.\n", irq);
 345                         spurious_irq_mask |= irqmask;
 346                 }
 347                 /* irq_err_count++; */
 348                 /*
 349                  * Theoretically we do not have to handle this IRQ,
 350                  * but in Linux this does not cause problems and is
 351                  * simpler for us.
 352                  */
 353                 goto handle_real_irq;
 354         }
 355 }
 356
 357 void init_8259A(void)
 358 {
 359         out8(IMR_1,0xff);       /* mask all of 8259A-1 */
 360         out8(IMR_2,0xff);       /* mask all of 8259A-2 */
 361
 362         out8(ICW1_1,0x11);      /* ICW1: select 8259A-1 init */
 363         out8(ICW2_1,0x20 + 0);  /* ICW2: 8259A-1 IR0-7 mapped to 0x20-0x27 */
 364         out8(ICW3_1,0x04);      /* 8259A-1 (the master) has a slave on IR2 */
 365         out8(ICW4_1,0x01);      /* master expects normal EOI */
 366         out8(ICW1_2,0x11);      /* ICW2: select 8259A-2 init */
 367         out8(ICW2_2,0x20 + 8);  /* ICW2: 8259A-2 IR0-7 mapped to 0x28-0x2f */
 368         out8(ICW3_2,0x02);      /* 8259A-2 is a slave on master's IR2 */
 369         out8(ICW4_2,0x01);      /* (slave's support for AEOI in flat mode
 370                                     is to be investigated) */
 371         udelay(10000);          /* wait for 8259A to initialize */
 372         out8(IMR_1,cached_imr1);        /* restore master IRQ mask */
 373         udelay(10000);          /* wait for 8259A to initialize */
 374         out8(IMR_2,cached_imr2);        /* restore slave IRQ mask */
 375 }
 376
 377
 378 #define PCI_INT_ACK_ADDR 0xEED00000
 379
 380 int handle_isa_int(void)
 381 {
 382         unsigned long irqack;
 383         unsigned char isr1,isr2,irq;
 384         /* first we acknokledge the int via the PCI bus */
 385         irqack=in32(PCI_INT_ACK_ADDR);
 386         /* now we get the ISRs */
 387         isr2=in8(ISR_2);
 388         isr1=in8(ISR_1);
 389         irq=(unsigned char)irqack;
 390         if((irq==7)&&((isr1&0x80)==0)) {
 391                 PRINTF("IRQ7 detected but not in ISR\n");
 392         }
 393         else {
 394                 /* we should handle cascaded interrupts here also */
 395                 /* printf("ISA Irq %d\n",irq); */
 396                 isa_irqs[irq].count++;
 397         if (isa_irqs[irq].handler != NULL)
 398                 (*isa_irqs[irq].handler)(isa_irqs[irq].arg);      /* call isr */
 399         else
 400         {
 401         PRINTF ("bogus interrupt vector 0x%x\n", irq);
 402         }
 403         }
 404         /* issue EOI instruction to clear the IRQ */
 405         mask_and_ack_8259A(irq);
 406         return 0;
 407 }
 408
 409
 410 /******************************************************************
 411  * Install and free an ISA interrupt handler.
 412  */
 413
 414 void isa_irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
 415 {
 416   if (isa_irqs[vec].handler != NULL) {
 417    printf ("ISA Interrupt vector %d: handler 0x%x replacing 0x%x\n",
 418            vec, (uint)handler, (uint)isa_irqs[vec].handler);
 419   }
 420   isa_irqs[vec].handler = handler;
 421   isa_irqs[vec].arg     = arg;
 422   enable_8259A_irq(vec);
 423         PRINTF ("Install ISA IRQ %d ==> %p, @ %p mask=%04x\n", vec, handler, &isa_irqs[vec].handler,cached_irq_mask);
 424
 425 }
 426
 427 void isa_irq_free_handler(int vec)
 428 {
 429         disable_8259A_irq(vec);
 430   isa_irqs[vec].handler = NULL;
 431   isa_irqs[vec].arg     = NULL;
 432         printf ("Free ISA IRQ %d mask=%04x\n", vec, cached_irq_mask);
 433
 434 }
 435
 436 /****************************************************************************/
 437 void isa_init_irq_contr(void)
 438 {
 439         int i;
 440         /* disable all Interrupts */
 441         /* first write icws controller 1 */
 442         for(i=0;i<16;i++)
 443         {
 444                 isa_irqs[i].handler=NULL;
 445                 isa_irqs[i].arg=NULL;
 446                 isa_irqs[i].count=0;
 447         }
 448         init_8259A();
 449         out8(IMR_2,0xFF);
 450 }
 451
 452
 453 /******************************************************************
 454  * Init the ISA bus and devices.
 455  */
 456
 457
 458 int isa_init(void)
 459 {
 460         isa_sio_setup();
 461         drv_isa_kbd_init();
 462         return 0;
 463 }