board/ms7720se/lowlevel_init.S

   1 /*
   2  * (C) Copyright 2007
   3  * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <asm/macro.h>
   9
  10         .global lowlevel_init
  11
  12         .text
  13         .align  2
  14
  15 lowlevel_init:
  16
  17         write16 WTCSR_A, WTCSR_D
  18
  19         write16 WTCNT_A, WTCNT_D
  20
  21         write16 FRQCR_A, FRQCR_D
  22
  23         write16 UCLKCR_A, UCLKCR_D
  24
  25         write32 CMNCR_A, CMNCR_D
  26
  27         write32 CMNCR_A, CMNCR_D
  28
  29         write32 CS0BCR_A, CS0BCR_D
  30
  31         write32 CS2BCR_A, CS2BCR_D
  32
  33         write32 CS3BCR_A, CS3BCR_D
  34
  35         write32 CS4BCR_A, CS4BCR_D
  36
  37         write32 CS5ABCR_A, CS5ABCR_D
  38
  39         write32 CS5BBCR_A, CS5BBCR_D
  40
  41         write32 CS6ABCR_A, CS6ABCR_D
  42
  43         write32 CS6BBCR_A, CS6BBCR_D
  44
  45         write32 CS0WCR_A, CS0WCR_D
  46
  47         write32 CS2WCR_A, CS2WCR_D
  48
  49         write32 CS3WCR_A, CS3WCR_D
  50
  51         write32 CS4WCR_A, CS4WCR_D
  52
  53         write32 CS5AWCR_A, CS5AWCR_D
  54
  55         write32 CS5BWCR_A, CS5BWCR_D
  56
  57         write32 CS6AWCR_A, CS6AWCR_D
  58
  59         write32 CS6BWCR_A, CS6BWCR_D
  60
  61         write32 SDCR_A, SDCR_D1
  62
  63         write32 RTCSR_A, RTCSR_D
  64
  65         write32 RTCNT_A RTCNT_D
  66
  67         write32 RTCOR_A, RTCOR_D
  68
  69         write32 SDCR_A, SDCR_D2
  70
  71         write16 SDMR3_A, SDMR3_D
  72
  73         write16 PCCR_A, PCCR_D
  74
  75         write16 PDCR_A, PDCR_D
  76
  77         write16 PECR_A, PECR_D
  78
  79         write16 PGCR_A, PGCR_D
  80
  81         write16 PHCR_A, PHCR_D
  82
  83         write16 PPCR_A, PPCR_D
  84
  85         write16 PTCR_A, PTCR_D
  86
  87         write16 PVCR_A, PVCR_D
  88
  89         write16 PSELA_A, PSELA_D
  90
  91         write32 CCR_A, CCR_D
  92
  93         write8  LED_A, LED_D
  94
  95         rts
  96          nop
  97
  98         .align 4
  99
 100 FRQCR_A:        .long   0xA415FF80      /* FRQCR Address */
 101 WTCNT_A:        .long   0xA415FF84
 102 WTCSR_A:        .long   0xA415FF86
 103 UCLKCR_A:       .long   0xA40A0008
 104 FRQCR_D:        .word   0x1103          /* I:B:P=8:4:2 */
 105 WTCNT_D:        .word   0x5A00
 106 WTCSR_D:        .word   0xA506
 107 UCLKCR_D:       .word   0xA5C0
 108
 109 #define BSC_BASE        0xA4FD0000
 110 CMNCR_A:        .long   BSC_BASE
 111 CS0BCR_A:       .long   BSC_BASE + 0x04
 112 CS2BCR_A:       .long   BSC_BASE + 0x08
 113 CS3BCR_A:       .long   BSC_BASE + 0x0C
 114 CS4BCR_A:       .long   BSC_BASE + 0x10
 115 CS5ABCR_A:      .long   BSC_BASE + 0x14
 116 CS5BBCR_A:      .long   BSC_BASE + 0x18
 117 CS6ABCR_A:      .long   BSC_BASE + 0x1C
 118 CS6BBCR_A:      .long   BSC_BASE + 0x20
 119 CS0WCR_A:       .long   BSC_BASE + 0x24
 120 CS2WCR_A:       .long   BSC_BASE + 0x28
 121 CS3WCR_A:       .long   BSC_BASE + 0x2C
 122 CS4WCR_A:       .long   BSC_BASE + 0x30
 123 CS5AWCR_A:      .long   BSC_BASE + 0x34
 124 CS5BWCR_A:      .long   BSC_BASE + 0x38
 125 CS6AWCR_A:      .long   BSC_BASE + 0x3C
 126 CS6BWCR_A:      .long   BSC_BASE + 0x40
 127 SDCR_A:         .long   BSC_BASE + 0x44
 128 RTCSR_A:        .long   BSC_BASE + 0x48
 129 RTCNT_A:        .long   BSC_BASE + 0x4C
 130 RTCOR_A:        .long   BSC_BASE + 0x50
 131 SDMR3_A:        .long   BSC_BASE + 0x58C0
 132
 133 CMNCR_D:        .long   0x00000010
 134 CS0BCR_D:       .long   0x36DB0400
 135 CS2BCR_D:       .long   0x36DB0400
 136 CS3BCR_D:       .long   0x36DB4600
 137 CS4BCR_D:       .long   0x36DB0400
 138 CS5ABCR_D:      .long   0x36DB0400
 139 CS5BBCR_D:      .long   0x36DB0200
 140 CS6ABCR_D:      .long   0x36DB0400
 141 CS6BBCR_D:      .long   0x36DB0400
 142 CS0WCR_D:       .long   0x00000B01
 143 CS2WCR_D:       .long   0x00000500
 144 CS3WCR_D:       .long   0x00006D1B
 145 CS4WCR_D:       .long   0x00000500
 146 CS5AWCR_D:      .long   0x00000500
 147 CS5BWCR_D:      .long   0x00000500
 148 CS6AWCR_D:      .long   0x00000500
 149 CS6BWCR_D:      .long   0x00000500
 150 SDCR_D1:        .long   0x00000011
 151 RTCSR_D:        .long   0xA55A0010
 152 RTCNT_D:        .long   0xA55A001F
 153 RTCOR_D:        .long   0xA55A001F
 154 SDMR3_D:        .word   0x0000
 155 .align 2
 156 SDCR_D2:        .long   0x00000811
 157
 158 #define PFC_BASE        0xA4050100
 159 PCCR_A:         .long   PFC_BASE + 0x04
 160 PDCR_A:         .long   PFC_BASE + 0x06
 161 PECR_A:         .long   PFC_BASE + 0x08
 162 PGCR_A:         .long   PFC_BASE + 0x0C
 163 PHCR_A:         .long   PFC_BASE + 0x0E
 164 PPCR_A:         .long   PFC_BASE + 0x18
 165 PTCR_A:         .long   PFC_BASE + 0x1E
 166 PVCR_A:         .long   PFC_BASE + 0x22
 167 PSELA_A:        .long   PFC_BASE + 0x24
 168
 169 PCCR_D:         .word   0x0000
 170 PDCR_D:         .word   0x0000
 171 PECR_D:         .word   0x0000
 172 PGCR_D:         .word   0x0000
 173 PHCR_D:         .word   0x0000
 174 PPCR_D:         .word   0x00AA
 175 PTCR_D:         .word   0x0280
 176 PVCR_D:         .word   0x0000
 177 PSELA_D:        .word   0x0000
 178 .align 2
 179
 180 CCR_A:          .long   0xFFFFFFEC
 181 !CCR_D:         .long   0x0000000D
 182 CCR_D:          .long   0x0000000B
 183
 184 LED_A:          .long   0xB6800000
 185 LED_D:          .long   0xFF