board/munices/munices.c

   1 /*
   2  * (C) Copyright 2007
   3  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <mpc5xxx.h>
  10 #include <pci.h>
  11
  12 #include "mt48lc16m16a2-75.h"
  13
  14 #ifndef CONFIG_SYS_RAMBOOT
  15 static void sdram_start (int hi_addr)
  16 {
  17         long hi_addr_bit = hi_addr ? 0x01000000 : 0;
  18
  19         /* unlock mode register */
  20         *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
  21         __asm__ volatile ("sync");
  22
  23         /* precharge all banks */
  24         *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
  25         __asm__ volatile ("sync");
  26
  27 #if SDRAM_DDR
  28         /* set mode register: extended mode */
  29         *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
  30         __asm__ volatile ("sync");
  31
  32         /* set mode register: reset DLL */
  33         *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
  34         __asm__ volatile ("sync");
  35 #endif
  36
  37         /* precharge all banks */
  38         *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
  39         __asm__ volatile ("sync");
  40
  41         /* auto refresh */
  42         *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
  43         __asm__ volatile ("sync");
  44
  45         /* set mode register */
  46         *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
  47         __asm__ volatile ("sync");
  48
  49         /* normal operation */
  50         *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
  51         __asm__ volatile ("sync");
  52 }
  53 #endif
  54
  55 /*
  56  * ATTENTION: Although partially referenced initdram does NOT make real use
  57  *            use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
  58  *            is something else than 0x00000000.
  59  */
  60
  61 phys_size_t initdram (int board_type)
  62 {
  63         ulong dramsize = 0;
  64         ulong dramsize2 = 0;
  65 #ifndef CONFIG_SYS_RAMBOOT
  66         ulong test1, test2;
  67
  68         /* setup SDRAM chip selects */
  69         *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001b;/* 256MB at 0x0 */
  70         *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x10000000;/* disabled */
  71         __asm__ volatile ("sync");
  72
  73         /* setup config registers */
  74         *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
  75         *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
  76         __asm__ volatile ("sync");
  77
  78 #if SDRAM_DDR && SDRAM_TAPDELAY
  79         /* set tap delay */
  80         *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
  81         __asm__ volatile ("sync");
  82 #endif
  83
  84         /* find RAM size using SDRAM CS0 only */
  85         sdram_start(0);
  86         test1 = (ulong )get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x10000000);
  87         sdram_start(1);
  88         test2 = (ulong )get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x10000000);
  89         if (test1 > test2) {
  90                 sdram_start(0);
  91                 dramsize = test1;
  92         } else {
  93                 dramsize = test2;
  94         }
  95
  96         /* memory smaller than 1MB is impossible */
  97         if (dramsize < (1 << 20)) {
  98                 dramsize = 0;
  99         }
 100
 101         /* set SDRAM CS0 size according to the amount of RAM found */
 102         if (dramsize > 0) {
 103                 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1;
 104         } else {
 105                 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
 106         }
 107
 108 #else /* CONFIG_SYS_RAMBOOT */
 109
 110         /* retrieve size of memory connected to SDRAM CS0 */
 111         dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
 112         if (dramsize >= 0x13) {
 113                 dramsize = (1 << (dramsize - 0x13)) << 20;
 114         } else {
 115                 dramsize = 0;
 116         }
 117
 118         /* retrieve size of memory connected to SDRAM CS1 */
 119         dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
 120         if (dramsize2 >= 0x13) {
 121                 dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
 122         } else {
 123                 dramsize2 = 0;
 124         }
 125
 126 #endif /* CONFIG_SYS_RAMBOOT */
 127
 128         return dramsize + dramsize2;
 129 }
 130
 131 int checkboard (void)
 132 {
 133         puts ("Board: MUNICes\n");
 134         return 0;
 135 }
 136
 137 #ifdef  CONFIG_PCI
 138 static struct pci_controller hose;
 139
 140 extern void pci_mpc5xxx_init(struct pci_controller *);
 141
 142 void pci_init_board(void)
 143 {
 144         pci_mpc5xxx_init(&hose);
 145 }
 146 #endif
 147
 148 #ifdef CONFIG_OF_BOARD_SETUP
 149 int ft_board_setup(void *blob, bd_t *bd)
 150 {
 151         ft_cpu_setup(blob, bd);
 152
 153         return 0;
 154 }
 155 #endif /* CONFIG_OF_BOARD_SETUP */