board/nvidia/dalmore/pinmux-config-dalmore.h

   1 /*
   2  * Copyright (c) 2010-2013, NVIDIA CORPORATION.  All rights reserved.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0
   5  */
   6
   7 #ifndef _PINMUX_CONFIG_DALMORE_H_
   8 #define _PINMUX_CONFIG_DALMORE_H_
   9
  10 #define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)         \
  11         {                                                       \
  12                 .pingrp         = PMUX_PINGRP_##_pingrp,        \
  13                 .func           = PMUX_FUNC_##_mux,             \
  14                 .pull           = PMUX_PULL_##_pull,            \
  15                 .tristate       = PMUX_TRI_##_tri,              \
  16                 .io             = PMUX_PIN_##_io,               \
  17                 .lock           = PMUX_PIN_LOCK_DEFAULT,        \
  18                 .od             = PMUX_PIN_OD_DEFAULT,          \
  19                 .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
  20         }
  21
  22 #define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \
  23         {                                                       \
  24                 .pingrp         = PMUX_PINGRP_##_pingrp,        \
  25                 .func           = PMUX_FUNC_##_mux,             \
  26                 .pull           = PMUX_PULL_##_pull,            \
  27                 .tristate       = PMUX_TRI_##_tri,              \
  28                 .io             = PMUX_PIN_##_io,               \
  29                 .lock           = PMUX_PIN_LOCK_##_lock,        \
  30                 .od             = PMUX_PIN_OD_##_od,            \
  31                 .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
  32         }
  33
  34 #define DDC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
  35         {                                                       \
  36                 .pingrp         = PMUX_PINGRP_##_pingrp,        \
  37                 .func           = PMUX_FUNC_##_mux,             \
  38                 .pull           = PMUX_PULL_##_pull,            \
  39                 .tristate       = PMUX_TRI_##_tri,              \
  40                 .io             = PMUX_PIN_##_io,               \
  41                 .lock           = PMUX_PIN_LOCK_##_lock,        \
  42                 .rcv_sel        = PMUX_PIN_RCV_SEL_##_rcv_sel,  \
  43                 .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
  44         }
  45
  46 #define VI_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
  47         {                                                       \
  48                 .pingrp         = PMUX_PINGRP_##_pingrp,        \
  49                 .func           = PMUX_FUNC_##_mux,             \
  50                 .pull           = PMUX_PULL_##_pull,            \
  51                 .tristate       = PMUX_TRI_##_tri,              \
  52                 .io             = PMUX_PIN_##_io,               \
  53                 .lock           = PMUX_PIN_LOCK_##_lock,        \
  54                 .od             = PMUX_PIN_OD_DEFAULT,          \
  55                 .ioreset        = PMUX_PIN_IO_RESET_##_ioreset  \
  56         }
  57
  58 #define CEC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)         \
  59         {                                                               \
  60                 .pingrp     = PMUX_PINGRP_##_pingrp,                    \
  61                 .func       = PMUX_FUNC_##_mux,                         \
  62                 .pull       = PMUX_PULL_##_pull,                        \
  63                 .tristate   = PMUX_TRI_##_tri,                          \
  64                 .io         = PMUX_PIN_##_io,                           \
  65                 .lock       = PMUX_PIN_LOCK_##_lock,                    \
  66                 .od         = PMUX_PIN_OD_##_od,                        \
  67                 .ioreset    = PMUX_PIN_IO_RESET_DEFAULT,                \
  68         }
  69
  70 #define USB_PINMUX CEC_PINMUX
  71
  72 #define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
  73         {                                               \
  74                 .drvgrp = PMUX_DRVGRP_##_drvgrp,        \
  75                 .slwf   = _slwf,                        \
  76                 .slwr   = _slwr,                        \
  77                 .drvup  = _drvup,                       \
  78                 .drvdn  = _drvdn,                       \
  79                 .lpmd   = PMUX_LPMD_##_lpmd,            \
  80                 .schmt  = PMUX_SCHMT_##_schmt,          \
  81                 .hsm    = PMUX_HSM_##_hsm,              \
  82         }
  83
  84 static struct pmux_pingrp_config tegra114_pinmux_common[] = {
  85         /* EXTPERIPH1 pinmux */
  86         DEFAULT_PINMUX(CLK1_OUT_PW4,      EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
  87
  88         /* I2S0 pinmux */
  89         DEFAULT_PINMUX(DAP1_DIN_PN1,      I2S0,        NORMAL,    TRISTATE, INPUT),
  90         DEFAULT_PINMUX(DAP1_DOUT_PN2,     I2S0,        NORMAL,    NORMAL,   INPUT),
  91         DEFAULT_PINMUX(DAP1_FS_PN0,       I2S0,        NORMAL,    NORMAL,   INPUT),
  92         DEFAULT_PINMUX(DAP1_SCLK_PN3,     I2S0,        NORMAL,    NORMAL,   INPUT),
  93
  94         /* I2S1 pinmux */
  95         DEFAULT_PINMUX(DAP2_DIN_PA4,      I2S1,        NORMAL,    TRISTATE, INPUT),
  96         DEFAULT_PINMUX(DAP2_DOUT_PA5,     I2S1,        NORMAL,    NORMAL,   INPUT),
  97         DEFAULT_PINMUX(DAP2_FS_PA2,       I2S1,        NORMAL,    NORMAL,   INPUT),
  98         DEFAULT_PINMUX(DAP2_SCLK_PA3,     I2S1,        NORMAL,    NORMAL,   INPUT),
  99
 100         /* I2S3 pinmux */
 101         DEFAULT_PINMUX(DAP4_DIN_PP5,      I2S3,        NORMAL,    NORMAL,   INPUT),
 102         DEFAULT_PINMUX(DAP4_DOUT_PP6,     I2S3,        NORMAL,    NORMAL,   INPUT),
 103         DEFAULT_PINMUX(DAP4_FS_PP4,       I2S3,        NORMAL,    NORMAL,   INPUT),
 104         DEFAULT_PINMUX(DAP4_SCLK_PP7,     I2S3,        NORMAL,    NORMAL,   INPUT),
 105
 106         /* CLDVFS pinmux */
 107         DEFAULT_PINMUX(DVFS_PWM_PX0,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
 108         DEFAULT_PINMUX(DVFS_CLK_PX2,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
 109
 110         /* ULPI pinmux */
 111         DEFAULT_PINMUX(ULPI_CLK_PY0,      ULPI,        NORMAL,    NORMAL,   INPUT),
 112         DEFAULT_PINMUX(ULPI_DATA0_PO1,    ULPI,        NORMAL,    NORMAL,   INPUT),
 113         DEFAULT_PINMUX(ULPI_DATA1_PO2,    ULPI,        NORMAL,    NORMAL,   INPUT),
 114         DEFAULT_PINMUX(ULPI_DATA2_PO3,    ULPI,        NORMAL,    NORMAL,   INPUT),
 115         DEFAULT_PINMUX(ULPI_DATA3_PO4,    ULPI,        NORMAL,    NORMAL,   INPUT),
 116         DEFAULT_PINMUX(ULPI_DATA4_PO5,    ULPI,        NORMAL,    NORMAL,   INPUT),
 117         DEFAULT_PINMUX(ULPI_DATA5_PO6,    ULPI,        NORMAL,    NORMAL,   INPUT),
 118         DEFAULT_PINMUX(ULPI_DATA6_PO7,    ULPI,        NORMAL,    NORMAL,   INPUT),
 119         DEFAULT_PINMUX(ULPI_DATA7_PO0,    ULPI,        NORMAL,    NORMAL,   INPUT),
 120         DEFAULT_PINMUX(ULPI_DIR_PY1,      ULPI,        NORMAL,    TRISTATE, INPUT),
 121         DEFAULT_PINMUX(ULPI_NXT_PY2,      ULPI,        NORMAL,    TRISTATE, INPUT),
 122         DEFAULT_PINMUX(ULPI_STP_PY3,      ULPI,        NORMAL,    NORMAL,   OUTPUT),
 123
 124         /* I2C3 pinmux */
 125         I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 126         I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 127
 128         /* VI pinmux */
 129         VI_PINMUX(CAM_MCLK_PCC0, VI_ALT3,  NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
 130
 131         /* VI_ALT1 pinmux */
 132         VI_PINMUX(PBB0, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
 133
 134         /* VGP4 pinmux */
 135         VI_PINMUX(PBB4, VGP4,    NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
 136
 137         /* I2C2 pinmux */
 138         I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 139         I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 140
 141         /* UARTD pinmux */
 142         DEFAULT_PINMUX(GMI_A16_PJ7,       UARTD,       NORMAL,    NORMAL,   OUTPUT),
 143         DEFAULT_PINMUX(GMI_A17_PB0,       UARTD,       NORMAL,    TRISTATE, INPUT),
 144         DEFAULT_PINMUX(GMI_A18_PB1,       UARTD,       NORMAL,    TRISTATE, INPUT),
 145         DEFAULT_PINMUX(GMI_A19_PK7,       UARTD,       NORMAL,    NORMAL,   OUTPUT),
 146
 147         /* SPI4 pinmux */
 148         DEFAULT_PINMUX(GMI_AD5_PG5,       SPI4,        NORMAL,    NORMAL,   INPUT),
 149         DEFAULT_PINMUX(GMI_AD6_PG6,       SPI4,        UP,        NORMAL,   INPUT),
 150         DEFAULT_PINMUX(GMI_AD7_PG7,       SPI4,        UP,        NORMAL,   INPUT),
 151         DEFAULT_PINMUX(GMI_AD12_PH4,      RSVD1,       NORMAL,    NORMAL,   OUTPUT),
 152         DEFAULT_PINMUX(GMI_CS6_N_PI3,     SPI4,        NORMAL,    NORMAL,   INPUT),
 153         DEFAULT_PINMUX(GMI_WR_N_PI0,      SPI4,        NORMAL,    NORMAL,   INPUT),
 154
 155         /* PWM1 pinmux */
 156         DEFAULT_PINMUX(GMI_AD9_PH1,       PWM1,        NORMAL,    NORMAL,   OUTPUT),
 157
 158         /* SOC pinmux */
 159         DEFAULT_PINMUX(GMI_CS1_N_PJ2,     SOC,         NORMAL,    TRISTATE, INPUT),
 160         DEFAULT_PINMUX(GMI_OE_N_PI1,      SOC,         NORMAL,    TRISTATE, INPUT),
 161
 162         /* EXTPERIPH2 pinmux */
 163         DEFAULT_PINMUX(CLK2_OUT_PW5,      EXTPERIPH2,  NORMAL,    NORMAL,   OUTPUT),
 164
 165         /* SDMMC1 pinmux */
 166         DEFAULT_PINMUX(SDMMC1_CLK_PZ0,    SDMMC1,      NORMAL,    NORMAL,   INPUT),
 167         DEFAULT_PINMUX(SDMMC1_CMD_PZ1,    SDMMC1,      UP,        NORMAL,   INPUT),
 168         DEFAULT_PINMUX(SDMMC1_DAT0_PY7,   SDMMC1,      UP,        NORMAL,   INPUT),
 169         DEFAULT_PINMUX(SDMMC1_DAT1_PY6,   SDMMC1,      UP,        NORMAL,   INPUT),
 170         DEFAULT_PINMUX(SDMMC1_DAT2_PY5,   SDMMC1,      UP,        NORMAL,   INPUT),
 171         DEFAULT_PINMUX(SDMMC1_DAT3_PY4,   SDMMC1,      UP,        NORMAL,   INPUT),
 172
 173         /* SDMMC3 pinmux */
 174         DEFAULT_PINMUX(SDMMC3_CLK_PA6,    SDMMC3,      NORMAL,    NORMAL,   INPUT),
 175         DEFAULT_PINMUX(SDMMC3_CMD_PA7,    SDMMC3,      UP,        NORMAL,   INPUT),
 176         DEFAULT_PINMUX(SDMMC3_DAT0_PB7,   SDMMC3,      UP,        NORMAL,   INPUT),
 177         DEFAULT_PINMUX(SDMMC3_DAT1_PB6,   SDMMC3,      UP,        NORMAL,   INPUT),
 178         DEFAULT_PINMUX(SDMMC3_DAT2_PB5,   SDMMC3,      UP,        NORMAL,   INPUT),
 179         DEFAULT_PINMUX(SDMMC3_DAT3_PB4,   SDMMC3,      UP,        NORMAL,   INPUT),
 180         DEFAULT_PINMUX(SDMMC3_CLK_LB_IN_PEE5,  SDMMC3,  UP,        TRISTATE, INPUT),
 181         DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3,  DOWN,      NORMAL,   INPUT),
 182
 183         /* SDMMC4 pinmux */
 184         DEFAULT_PINMUX(SDMMC4_CLK_PCC4,    SDMMC4,      NORMAL,    NORMAL,   INPUT),
 185         DEFAULT_PINMUX(SDMMC4_CMD_PT7,     SDMMC4,      UP,        NORMAL,   INPUT),
 186         DEFAULT_PINMUX(SDMMC4_DAT0_PAA0,   SDMMC4,      UP,        NORMAL,   INPUT),
 187         DEFAULT_PINMUX(SDMMC4_DAT1_PAA1,   SDMMC4,      UP,        NORMAL,   INPUT),
 188         DEFAULT_PINMUX(SDMMC4_DAT2_PAA2,   SDMMC4,      UP,        NORMAL,   INPUT),
 189         DEFAULT_PINMUX(SDMMC4_DAT3_PAA3,   SDMMC4,      UP,        NORMAL,   INPUT),
 190         DEFAULT_PINMUX(SDMMC4_DAT4_PAA4,   SDMMC4,      UP,        NORMAL,   INPUT),
 191         DEFAULT_PINMUX(SDMMC4_DAT5_PAA5,   SDMMC4,      UP,        NORMAL,   INPUT),
 192         DEFAULT_PINMUX(SDMMC4_DAT6_PAA6,   SDMMC4,      UP,        NORMAL,   INPUT),
 193         DEFAULT_PINMUX(SDMMC4_DAT7_PAA7,   SDMMC4,      UP,        NORMAL,   INPUT),
 194
 195         /* BLINK pinmux */
 196         DEFAULT_PINMUX(CLK_32K_OUT_PA0,   BLINK,       NORMAL,    NORMAL,   OUTPUT),
 197
 198         /* KBC pinmux */
 199         DEFAULT_PINMUX(KB_COL0_PQ0,       KBC,         UP,        NORMAL,   INPUT),
 200         DEFAULT_PINMUX(KB_COL1_PQ1,       KBC,         UP,        NORMAL,   INPUT),
 201         DEFAULT_PINMUX(KB_COL2_PQ2,       KBC,         UP,        NORMAL,   INPUT),
 202         DEFAULT_PINMUX(KB_ROW0_PR0,       KBC,         UP,        NORMAL,   INPUT),
 203         DEFAULT_PINMUX(KB_ROW1_PR1,       KBC,         UP,        NORMAL,   INPUT),
 204         DEFAULT_PINMUX(KB_ROW2_PR2,       KBC,         UP,        NORMAL,   INPUT),
 205
 206         /*Audio Codec*/
 207         DEFAULT_PINMUX(DAP3_DIN_PP1,      RSVD1,       NORMAL,    TRISTATE, OUTPUT),
 208         DEFAULT_PINMUX(DAP3_SCLK_PP3,     RSVD1,       NORMAL,    TRISTATE, OUTPUT),
 209         DEFAULT_PINMUX(PV0,               RSVD1,       NORMAL,    TRISTATE, OUTPUT),
 210         DEFAULT_PINMUX(KB_ROW7_PR7,       RSVD1,       UP,        NORMAL,   INPUT),
 211
 212         /* UARTA pinmux */
 213         DEFAULT_PINMUX(KB_ROW10_PS2,      UARTA,       NORMAL,    TRISTATE, INPUT),
 214         DEFAULT_PINMUX(KB_ROW9_PS1,       UARTA,       NORMAL,    NORMAL,   OUTPUT),
 215
 216         /* I2CPWR pinmux (I2C5) */
 217         I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 218         I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 219
 220         /* SYSCLK pinmux */
 221         DEFAULT_PINMUX(SYS_CLK_REQ_PZ5,   SYSCLK,      NORMAL,    NORMAL,   OUTPUT),
 222
 223         /* RTCK pinmux */
 224         DEFAULT_PINMUX(JTAG_RTCK,     RTCK,        NORMAL,    NORMAL,   INPUT),
 225
 226         /* CLK pinmux */
 227         DEFAULT_PINMUX(CLK_32K_IN,    CLK,         NORMAL,    TRISTATE, INPUT),
 228
 229         /* PWRON pinmux */
 230         DEFAULT_PINMUX(CORE_PWR_REQ,  PWRON,       NORMAL,    NORMAL,   OUTPUT),
 231
 232         /* CPU pinmux */
 233         DEFAULT_PINMUX(CPU_PWR_REQ,   CPU,         NORMAL,    NORMAL,   OUTPUT),
 234
 235         /* PMI pinmux */
 236         DEFAULT_PINMUX(PWR_INT_N,     PMI,         NORMAL,    TRISTATE, INPUT),
 237
 238         /* RESET_OUT_N pinmux */
 239         DEFAULT_PINMUX(RESET_OUT_N,   RESET_OUT_N, NORMAL,    NORMAL,   OUTPUT),
 240
 241         /* EXTPERIPH3 pinmux */
 242         DEFAULT_PINMUX(CLK3_OUT_PEE0,      EXTPERIPH3,  NORMAL,    NORMAL,   OUTPUT),
 243
 244         /* I2C1 pinmux */
 245         I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 246         I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 247
 248         /* UARTB pinmux */
 249         DEFAULT_PINMUX(UART2_CTS_N_PJ5,   UARTB,       NORMAL,    TRISTATE, INPUT),
 250         DEFAULT_PINMUX(UART2_RTS_N_PJ6,   UARTB,       NORMAL,    NORMAL,   OUTPUT),
 251
 252         /* IRDA pinmux */
 253         DEFAULT_PINMUX(UART2_RXD_PC3,     IRDA,        NORMAL,    TRISTATE, INPUT),
 254         DEFAULT_PINMUX(UART2_TXD_PC2,     IRDA,        NORMAL,    NORMAL,   OUTPUT),
 255
 256         /* UARTC pinmux */
 257         DEFAULT_PINMUX(UART3_CTS_N_PA1,   UARTC,       NORMAL,    TRISTATE, INPUT),
 258         DEFAULT_PINMUX(UART3_RTS_N_PC0,   UARTC,       NORMAL,    NORMAL,   OUTPUT),
 259         DEFAULT_PINMUX(UART3_RXD_PW7,     UARTC,       NORMAL,    TRISTATE, INPUT),
 260         DEFAULT_PINMUX(UART3_TXD_PW6,     UARTC,       NORMAL,    NORMAL,   OUTPUT),
 261
 262         /* OWR pinmux */
 263         DEFAULT_PINMUX(OWR,               OWR,         NORMAL,    NORMAL,   INPUT),
 264
 265         /* CEC pinmux */
 266         CEC_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
 267
 268         /* I2C4 pinmux */
 269         DDC_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
 270         DDC_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
 271
 272         /* USB pinmux */
 273         USB_PINMUX(USB_VBUS_EN0_PN4, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 274
 275         /* nct */
 276         DEFAULT_PINMUX(GPIO_X6_AUD_PX6,   SPI6,        UP,        TRISTATE, INPUT),
 277 };
 278
 279 static struct pmux_pingrp_config unused_pins_lowpower[] = {
 280         DEFAULT_PINMUX(CLK1_REQ_PEE2,     RSVD3,       DOWN, TRISTATE, OUTPUT),
 281         DEFAULT_PINMUX(USB_VBUS_EN1_PN5,  RSVD3,       DOWN, TRISTATE, OUTPUT),
 282 };
 283
 284 /* Initially setting all used GPIO's to non-TRISTATE */
 285 static struct pmux_pingrp_config tegra114_pinmux_set_nontristate[] = {
 286         DEFAULT_PINMUX(GPIO_X4_AUD_PX4,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
 287         DEFAULT_PINMUX(GPIO_X5_AUD_PX5,     RSVD1,  UP,      NORMAL,    INPUT),
 288         DEFAULT_PINMUX(GPIO_X6_AUD_PX6,     RSVD3,  UP,      NORMAL,    INPUT),
 289         DEFAULT_PINMUX(GPIO_X7_AUD_PX7,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
 290         DEFAULT_PINMUX(GPIO_W2_AUD_PW2,     RSVD1,  UP,      NORMAL,    INPUT),
 291         DEFAULT_PINMUX(GPIO_W3_AUD_PW3,     SPI6,   UP,      NORMAL,    INPUT),
 292         DEFAULT_PINMUX(GPIO_X1_AUD_PX1,     RSVD3,  DOWN,    NORMAL,    INPUT),
 293         DEFAULT_PINMUX(GPIO_X3_AUD_PX3,     RSVD3,  UP,      NORMAL,    INPUT),
 294
 295         DEFAULT_PINMUX(DAP3_FS_PP0,         I2S2,   DOWN,    NORMAL,    OUTPUT),
 296         DEFAULT_PINMUX(DAP3_DIN_PP1,        I2S2,   DOWN,    NORMAL,    OUTPUT),
 297         DEFAULT_PINMUX(DAP3_DOUT_PP2,       I2S2,   DOWN,    NORMAL,    OUTPUT),
 298         DEFAULT_PINMUX(DAP3_SCLK_PP3,       I2S2,   DOWN,    NORMAL,    OUTPUT),
 299         DEFAULT_PINMUX(PV0,                 RSVD3,  NORMAL,  NORMAL,    INPUT),
 300         DEFAULT_PINMUX(PV1,                 RSVD1,  NORMAL,  NORMAL,    INPUT),
 301
 302         DEFAULT_PINMUX(PBB3,                RSVD3,  DOWN,    NORMAL,    OUTPUT),
 303         DEFAULT_PINMUX(PBB5,                RSVD3,  DOWN,    NORMAL,    OUTPUT),
 304         DEFAULT_PINMUX(PBB6,                RSVD3,  DOWN,    NORMAL,    OUTPUT),
 305         DEFAULT_PINMUX(PBB7,                RSVD3,  DOWN,    NORMAL,    OUTPUT),
 306         DEFAULT_PINMUX(PCC1,                RSVD3,  DOWN,    NORMAL,    INPUT),
 307         DEFAULT_PINMUX(PCC2,                RSVD3,  DOWN,    NORMAL,    INPUT),
 308
 309         DEFAULT_PINMUX(GMI_AD0_PG0,         GMI,    NORMAL,  NORMAL,    OUTPUT),
 310         DEFAULT_PINMUX(GMI_AD1_PG1,         GMI,    NORMAL,  NORMAL,    OUTPUT),
 311         DEFAULT_PINMUX(GMI_AD10_PH2,        GMI,    DOWN,    NORMAL,    OUTPUT),
 312         DEFAULT_PINMUX(GMI_AD11_PH3,        GMI,    DOWN,    NORMAL,    OUTPUT),
 313         DEFAULT_PINMUX(GMI_AD12_PH4,        GMI,    UP,      NORMAL,    INPUT),
 314         DEFAULT_PINMUX(GMI_AD13_PH5,        GMI,    DOWN,    NORMAL,    OUTPUT),
 315         DEFAULT_PINMUX(GMI_AD2_PG2,         GMI,    NORMAL,  NORMAL,    INPUT),
 316         DEFAULT_PINMUX(GMI_AD3_PG3,         GMI,    NORMAL,  NORMAL,    INPUT),
 317         DEFAULT_PINMUX(GMI_AD8_PH0,         GMI,    DOWN,    NORMAL,    OUTPUT),
 318         DEFAULT_PINMUX(GMI_ADV_N_PK0,       GMI,    UP,      NORMAL,    INPUT),
 319         DEFAULT_PINMUX(GMI_CLK_PK1,         GMI,    DOWN,    NORMAL,    OUTPUT),
 320         DEFAULT_PINMUX(GMI_CS0_N_PJ0,       GMI,    UP,      NORMAL,    INPUT),
 321         DEFAULT_PINMUX(GMI_CS2_N_PK3,       GMI,    UP,      NORMAL,    INPUT),
 322         DEFAULT_PINMUX(GMI_CS3_N_PK4,       GMI,    UP,      NORMAL,    OUTPUT),
 323         DEFAULT_PINMUX(GMI_CS4_N_PK2,       GMI,    UP,      NORMAL,    INPUT),
 324         DEFAULT_PINMUX(GMI_CS7_N_PI6,       GMI,    UP,      NORMAL,    INPUT),
 325         DEFAULT_PINMUX(GMI_DQS_P_PJ3,       GMI,    UP,      NORMAL,    INPUT),
 326         DEFAULT_PINMUX(GMI_IORDY_PI5,       GMI,    UP,      NORMAL,    INPUT),
 327         DEFAULT_PINMUX(GMI_WP_N_PC7,        GMI,    UP,      NORMAL,    INPUT),
 328
 329         DEFAULT_PINMUX(SDMMC1_WP_N_PV3,     SPI4,   UP,      NORMAL,    OUTPUT),
 330         DEFAULT_PINMUX(CLK2_REQ_PCC5,       RSVD3,  NORMAL,  NORMAL,    OUTPUT),
 331
 332         DEFAULT_PINMUX(KB_COL3_PQ3,         KBC,    UP,      NORMAL,    OUTPUT),
 333         DEFAULT_PINMUX(KB_COL4_PQ4,         SDMMC3, UP,      NORMAL,    INPUT),
 334         DEFAULT_PINMUX(KB_COL5_PQ5,         KBC,    UP,      NORMAL,    INPUT),
 335         DEFAULT_PINMUX(KB_COL6_PQ6,         KBC,    UP,      NORMAL,    OUTPUT),
 336         DEFAULT_PINMUX(KB_COL7_PQ7,         KBC,    UP,      NORMAL,    OUTPUT),
 337         DEFAULT_PINMUX(KB_ROW3_PR3,         KBC,    DOWN,    NORMAL,    INPUT),
 338         DEFAULT_PINMUX(KB_ROW4_PR4,         KBC,    DOWN,    NORMAL,    INPUT),
 339         DEFAULT_PINMUX(KB_ROW6_PR6,         KBC,    DOWN,    NORMAL,    INPUT),
 340         DEFAULT_PINMUX(KB_ROW8_PS0,         KBC,    UP,      NORMAL,    INPUT),
 341
 342         DEFAULT_PINMUX(CLK3_REQ_PEE1,       RSVD3,  NORMAL,  NORMAL,    OUTPUT),
 343         DEFAULT_PINMUX(PU4,                 RSVD3,  NORMAL,  NORMAL,    OUTPUT),
 344         DEFAULT_PINMUX(PU5,                 RSVD3,  NORMAL,  NORMAL,    INPUT),
 345         DEFAULT_PINMUX(PU6,                 RSVD3,  NORMAL,  NORMAL,    INPUT),
 346
 347         DEFAULT_PINMUX(HDMI_INT_PN7,        RSVD1,   DOWN,    NORMAL,   INPUT),
 348
 349         DEFAULT_PINMUX(GMI_AD9_PH1,         PWM1,   NORMAL,   NORMAL,   OUTPUT),
 350         DEFAULT_PINMUX(SPDIF_IN_PK6,        USB,    NORMAL,   NORMAL,   INPUT),
 351
 352         DEFAULT_PINMUX(SDMMC3_CD_N_PV2,     SDMMC3, UP,       NORMAL,   INPUT),
 353 };
 354
 355 static struct pmux_drvgrp_config dalmore_padctrl[] = {
 356         /* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
 357         DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
 358                 SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE),
 359 };
 360 #endif /* PINMUX_CONFIG_COMMON_H */