board/omap730p2/omap730p2.c

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  *
   6  * (C) Copyright 2002
   7  * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
   8  *
   9  * (C) Copyright 2003
  10  * Texas Instruments, <www.ti.com>
  11  * Kshitij Gupta <Kshitij@ti.com>
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  */
  31
  32 #include <common.h>
  33 #if defined(CONFIG_OMAP730)
  34 #include <./configs/omap730.h>
  35 #endif
  36
  37 int test_boot_mode(void);
  38 void spin_up_leds(void);
  39 void flash__init (void);
  40 void ether__init (void);
  41 void set_muxconf_regs (void);
  42 void peripheral_power_enable (void);
  43
  44 #define FLASH_ON_CS0    1
  45 #define FLASH_ON_CS3    0
  46
  47 static inline void delay (unsigned long loops)
  48 {
  49         __asm__ volatile ("1:\n"
  50                           "subs %0, %1, #1\n"
  51                           "bne 1b":"=r" (loops):"0" (loops));
  52 }
  53
  54 int test_boot_mode(void)
  55 {
  56         /* Check for CS0 and CS3 address decode swapping */
  57         if (*((volatile int *)EMIFS_CONFIG) & 0x00000002)
  58                 return(FLASH_ON_CS3);
  59         else
  60                 return(FLASH_ON_CS0);
  61 }
  62
  63 /* Toggle backup LED indication */
  64 void toggle_backup_led(void)
  65 {
  66         static int  backupLEDState = 0;  /* Init variable so that the LED will be ON the first time */
  67         volatile unsigned int *IOConfReg;
  68
  69
  70         IOConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_5 + GPIO_DATA_OUTPUT);
  71
  72         if (backupLEDState != 0) {
  73                 *IOConfReg &= (0xFFFFEFFF);
  74                 backupLEDState = 0;
  75         } else {
  76                 *IOConfReg |= (0x00001000);
  77                 backupLEDState = 1;
  78         }
  79 }
  80
  81 /*
  82  * Miscellaneous platform dependent initialisations
  83  */
  84
  85 int board_init (void)
  86 {
  87         DECLARE_GLOBAL_DATA_PTR;
  88
  89         /* arch number of OMAP 730 P2 Board - Same as the Innovator! */
  90         gd->bd->bi_arch_number = MACH_TYPE_OMAP_PERSEUS2;
  91
  92         /* adress of boot parameters */
  93         gd->bd->bi_boot_params = 0x10000100;
  94
  95         /* Configure MUX settings */
  96         set_muxconf_regs ();
  97
  98         peripheral_power_enable ();
  99
 100         /* Backup LED indication via GPIO_140 -> Red led if MUX correctly setup */
 101         toggle_backup_led();
 102
 103         /* Hold GSM in reset until needed */
 104         *((volatile unsigned short *)M_CTL) &= ~1;
 105
 106         /*
 107          *  CSx timings, GPIO Mux ... setup
 108          */
 109
 110         /* Flash: CS0 timings setup */
 111         *((volatile unsigned int *) FLASH_CFG_0) = 0x0000fff3;
 112         *((volatile unsigned int *) FLASH_ACFG_0_1) = 0x00000088;
 113
 114         /* Ethernet support trough the debug board */
 115         /* CS1 timings setup */
 116         *((volatile unsigned int *) FLASH_CFG_1) = 0x0000fff3;
 117         *((volatile unsigned int *) FLASH_ACFG_0_1) = 0x00000000;
 118
 119         /* this speeds up your boot a quite a bit.  However to make it
 120          *  work, you need make sure your kernel startup flush bug is fixed.
 121          *  ... rkw ...
 122          */
 123         icache_enable ();
 124
 125         flash__init ();
 126         ether__init ();
 127
 128         return 0;
 129 }
 130
 131 int misc_init_r (void)
 132 {
 133         /* currently empty */
 134         return (0);
 135 }
 136
 137 /******************************
 138  Routine:
 139  Description:
 140 ******************************/
 141 void flash__init (void)
 142 {
 143         unsigned int regval;
 144
 145         regval = *((volatile unsigned int *) EMIFS_CONFIG);
 146         /* Turn off write protection for flash devices. */
 147         regval = regval | 0x0001;
 148         *((volatile unsigned int *) EMIFS_CONFIG) = regval;
 149 }
 150
 151 /*************************************************************
 152  Routine:ether__init
 153  Description: take the Ethernet controller out of reset and wait
 154                            for the EEPROM load to complete.
 155 *************************************************************/
 156 void ether__init (void)
 157 {
 158 #define LAN_RESET_REGISTER 0x0400001c
 159
 160         *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
 161         do {
 162                 *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001;
 163                 udelay (100);
 164         } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001);
 165
 166         do {
 167                 *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
 168                 udelay (100);
 169         } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000);
 170
 171 #define ETH_CONTROL_REG 0x0400030b
 172
 173         *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
 174         udelay (100);
 175 }
 176
 177 /******************************
 178  Routine:
 179  Description:
 180 ******************************/
 181 int dram_init (void)
 182 {
 183         DECLARE_GLOBAL_DATA_PTR;
 184
 185         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 186         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 187
 188         return 0;
 189 }
 190
 191 /******************************************************
 192  Routine: set_muxconf_regs
 193  Description: Setting up the configuration Mux registers
 194                           specific to the hardware
 195 *******************************************************/
 196 void set_muxconf_regs (void)
 197 {
 198         volatile unsigned int *MuxConfReg;
 199         /* set each registers to its reset value; */
 200
 201         /*
 202          *  Backup LED Indication
 203          */
 204
 205         /* Configure MUXed pin. Mode 6: GPIO_140 */
 206         MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF10);
 207         *MuxConfReg &= (0xFFFFFF1F);         /* Clear D_MPU_LPG1 */
 208         *MuxConfReg |= 0x000000C0;           /* Set D_MPU_LPG1 to 0x6 */
 209
 210         /* Configure GPIO_140 as output */
 211         MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_5 + GPIO_DIRECTION_CONTROL);
 212         *MuxConfReg &= (0xFFFFEFFF);         /* Clear direction (output) for GPIO 140 */
 213
 214         /*
 215          * Configure GPIOs for battery charge & feedback
 216          */
 217
 218         /* Configure MUXed pin. Mode 6: GPIO_35 */
 219         MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF3);
 220         *MuxConfReg &= 0xFFFFFFF1;           /* Clear M_CLK_OUT */
 221         *MuxConfReg |= 0x0000000C;           /* Set M_CLK_OUT = 0x6 (GPIOs) */
 222
 223         /* Configure MUXed pin. Mode 6: GPIO_72,73,74 */
 224         MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF5);
 225         *MuxConfReg &= 0xFFFF1FFF;           /* Clear D_DDR */
 226         *MuxConfReg |= 0x0000C000;           /* Set D_DDR = 0x6 (GPIOs) */
 227
 228         MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_3 + GPIO_DIRECTION_CONTROL);
 229         *MuxConfReg |= 0x00000100;           /* Configure GPIO_72 as input */
 230         *MuxConfReg &= 0xFFFFFDFF;           /* Configure GPIO_73 as output     */
 231
 232         /*
 233          * Allow battery charge
 234          */
 235
 236         MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_3 + GPIO_DATA_OUTPUT);
 237         *MuxConfReg &= (0xFFFFFDFF);         /* Clear GPIO_73 pin */
 238
 239         /*
 240          * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
 241          * It is used as the Ethernet controller interrupt
 242          */
 243         MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF9);
 244         *MuxConfReg &= 0x1FFFFFFF;
 245 }
 246
 247 /******************************************************
 248  Routine: peripheral_power_enable
 249  Description: Enable the power for UART1
 250 *******************************************************/
 251 void peripheral_power_enable (void)
 252 {
 253         volatile unsigned int *MuxConfReg;
 254
 255
 256         /* Set up pins used by UART */
 257
 258         /* Start UART clock (48MHz) */
 259         MuxConfReg = (volatile unsigned int *) (PERSEUS_PCC_CONF_REG);
 260         *MuxConfReg &= (0xFFFFFFF7);
 261         *MuxConfReg |= (0x00000008);
 262
 263         /* Get the UART pin in mode0  */
 264         MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF3);
 265         *MuxConfReg &= (0xFF1FFFFF);
 266         *MuxConfReg &= (0xF1FFFFFF);
 267 }