board/overo/overo.c

   1 /*
   2  * Maintainer : Steve Sakoman <steve@sakoman.com>
   3  *
   4  * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
   5  *      Richard Woodruff <r-woodruff2@ti.com>
   6  *      Syed Mohammed Khasim <khasim@ti.com>
   7  *      Sunil Kumar <sunilsaini05@gmail.com>
   8  *      Shashi Ranjan <shashiranjanmca05@gmail.com>
   9  *
  10  * (C) Copyright 2004-2008
  11  * Texas Instruments, <www.ti.com>
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  */
  31 #include <common.h>
  32 #include <netdev.h>
  33 #include <twl4030.h>
  34 #include <linux/mtd/nand.h>
  35 #include <asm/io.h>
  36 #include <asm/arch/mmc_host_def.h>
  37 #include <asm/arch/mux.h>
  38 #include <asm/arch/mem.h>
  39 #include <asm/arch/sys_proto.h>
  40 #include <asm/omap_gpmc.h>
  41 #include <asm/gpio.h>
  42 #include <asm/mach-types.h>
  43 #include "overo.h"
  44
  45 DECLARE_GLOBAL_DATA_PTR;
  46
  47 #define TWL4030_I2C_BUS                 0
  48 #define EXPANSION_EEPROM_I2C_BUS        2
  49 #define EXPANSION_EEPROM_I2C_ADDRESS    0x51
  50
  51 #define GUMSTIX_SUMMIT                  0x01000200
  52 #define GUMSTIX_TOBI                    0x02000200
  53 #define GUMSTIX_TOBI_DUO                0x03000200
  54 #define GUMSTIX_PALO35                  0x04000200
  55 #define GUMSTIX_PALO43                  0x05000200
  56 #define GUMSTIX_CHESTNUT43              0x06000200
  57 #define GUMSTIX_PINTO                   0x07000200
  58 #define GUMSTIX_GALLOP43                0x08000200
  59
  60 #define ETTUS_USRP_E                    0x01000300
  61
  62 #define GUMSTIX_NO_EEPROM               0xffffffff
  63
  64 static struct {
  65         unsigned int device_vendor;
  66         unsigned char revision;
  67         unsigned char content;
  68         char fab_revision[8];
  69         char env_var[16];
  70         char env_setting[64];
  71 } expansion_config;
  72
  73 #if defined(CONFIG_CMD_NET)
  74 static void setup_net_chip(void);
  75 #endif
  76
  77 /* GPMC definitions for LAN9221 chips on Tobi expansion boards */
  78 static const u32 gpmc_lan_config[] = {
  79     NET_LAN9221_GPMC_CONFIG1,
  80     NET_LAN9221_GPMC_CONFIG2,
  81     NET_LAN9221_GPMC_CONFIG3,
  82     NET_LAN9221_GPMC_CONFIG4,
  83     NET_LAN9221_GPMC_CONFIG5,
  84     NET_LAN9221_GPMC_CONFIG6,
  85     /*CONFIG7- computed as params */
  86 };
  87
  88 /*
  89  * Routine: board_init
  90  * Description: Early hardware init.
  91  */
  92 int board_init(void)
  93 {
  94         gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
  95         /* board id for Linux */
  96         gd->bd->bi_arch_number = MACH_TYPE_OVERO;
  97         /* boot param addr */
  98         gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
  99
 100         return 0;
 101 }
 102
 103 /*
 104  * Routine: get_board_revision
 105  * Description: Returns the board revision
 106  */
 107 int get_board_revision(void)
 108 {
 109         int revision;
 110
 111 #ifdef CONFIG_DRIVER_OMAP34XX_I2C
 112         unsigned char data;
 113
 114         /* board revisions <= R2410 connect 4030 irq_1 to gpio112             */
 115         /* these boards should return a revision number of 0                  */
 116         /* the code below forces a 4030 RTC irq to ensure that gpio112 is low */
 117         i2c_set_bus_num(TWL4030_I2C_BUS);
 118         data = 0x01;
 119         i2c_write(0x4B, 0x29, 1, &data, 1);
 120         data = 0x0c;
 121         i2c_write(0x4B, 0x2b, 1, &data, 1);
 122         i2c_read(0x4B, 0x2a, 1, &data, 1);
 123 #endif
 124
 125         if (!gpio_request(112, "") &&
 126             !gpio_request(113, "") &&
 127             !gpio_request(115, "")) {
 128
 129                 gpio_direction_input(112);
 130                 gpio_direction_input(113);
 131                 gpio_direction_input(115);
 132
 133                 revision = gpio_get_value(115) << 2 |
 134                            gpio_get_value(113) << 1 |
 135                            gpio_get_value(112);
 136         } else {
 137                 puts("Error: unable to acquire board revision GPIOs\n");
 138                 revision = -1;
 139         }
 140
 141         return revision;
 142 }
 143
 144 #ifdef CONFIG_SPL_BUILD
 145 /*
 146  * Routine: get_board_mem_timings
 147  * Description: If we use SPL then there is no x-loader nor config header
 148  * so we have to setup the DDR timings ourself on both banks.
 149  */
 150 void get_board_mem_timings(struct board_sdrc_timings *timings)
 151 {
 152         timings->mr = MICRON_V_MR_165;
 153         switch (get_board_revision()) {
 154         case REVISION_0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */
 155                 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
 156                 timings->ctrla = MICRON_V_ACTIMA_165;
 157                 timings->ctrlb = MICRON_V_ACTIMB_165;
 158                 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 159                 break;
 160         case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */
 161                 timings->mcfg = MICRON_V_MCFG_165(256 << 20);
 162                 timings->ctrla = MICRON_V_ACTIMA_165;
 163                 timings->ctrlb = MICRON_V_ACTIMB_165;
 164                 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 165                 break;
 166         case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */
 167                 timings->mcfg = HYNIX_V_MCFG_165(256 << 20);
 168                 timings->ctrla = HYNIX_V_ACTIMA_165;
 169                 timings->ctrlb = HYNIX_V_ACTIMB_165;
 170                 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 171                 break;
 172         default:
 173                 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
 174                 timings->ctrla = MICRON_V_ACTIMA_165;
 175                 timings->ctrlb = MICRON_V_ACTIMB_165;
 176                 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 177         }
 178 }
 179 #endif
 180
 181 /*
 182  * Routine: get_sdio2_config
 183  * Description: Return information about the wifi module connection
 184  *              Returns 0 if the module connects though a level translator
 185  *              Returns 1 if the module connects directly
 186  */
 187 int get_sdio2_config(void)
 188 {
 189         int sdio_direct;
 190
 191         if (!gpio_request(130, "") && !gpio_request(139, "")) {
 192
 193                 gpio_direction_output(130, 0);
 194                 gpio_direction_input(139);
 195
 196                 sdio_direct = 1;
 197                 gpio_set_value(130, 0);
 198                 if (gpio_get_value(139) == 0) {
 199                         gpio_set_value(130, 1);
 200                         if (gpio_get_value(139) == 1)
 201                                 sdio_direct = 0;
 202                 }
 203
 204                 gpio_direction_input(130);
 205         } else {
 206                 puts("Error: unable to acquire sdio2 clk GPIOs\n");
 207                 sdio_direct = -1;
 208         }
 209
 210         return sdio_direct;
 211 }
 212
 213 /*
 214  * Routine: get_expansion_id
 215  * Description: This function checks for expansion board by checking I2C
 216  *              bus 2 for the availability of an AT24C01B serial EEPROM.
 217  *              returns the device_vendor field from the EEPROM
 218  */
 219 unsigned int get_expansion_id(void)
 220 {
 221         i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
 222
 223         /* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */
 224         if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
 225                 i2c_set_bus_num(TWL4030_I2C_BUS);
 226                 return GUMSTIX_NO_EEPROM;
 227         }
 228
 229         /* read configuration data */
 230         i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
 231                  sizeof(expansion_config));
 232
 233         i2c_set_bus_num(TWL4030_I2C_BUS);
 234
 235         return expansion_config.device_vendor;
 236 }
 237
 238 /*
 239  * Routine: misc_init_r
 240  * Description: Configure board specific parts
 241  */
 242 int misc_init_r(void)
 243 {
 244         twl4030_power_init();
 245         twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
 246
 247 #if defined(CONFIG_CMD_NET)
 248         setup_net_chip();
 249 #endif
 250
 251         printf("Board revision: %d\n", get_board_revision());
 252
 253         switch (get_sdio2_config()) {
 254         case 0:
 255                 puts("Tranceiver detected on mmc2\n");
 256                 MUX_OVERO_SDIO2_TRANSCEIVER();
 257                 break;
 258         case 1:
 259                 puts("Direct connection on mmc2\n");
 260                 MUX_OVERO_SDIO2_DIRECT();
 261                 break;
 262         default:
 263                 puts("Unable to detect mmc2 connection type\n");
 264         }
 265
 266         switch (get_expansion_id()) {
 267         case GUMSTIX_SUMMIT:
 268                 printf("Recognized Summit expansion board (rev %d %s)\n",
 269                         expansion_config.revision,
 270                         expansion_config.fab_revision);
 271                 setenv("defaultdisplay", "dvi");
 272                 break;
 273         case GUMSTIX_TOBI:
 274                 printf("Recognized Tobi expansion board (rev %d %s)\n",
 275                         expansion_config.revision,
 276                         expansion_config.fab_revision);
 277                 setenv("defaultdisplay", "dvi");
 278                 break;
 279         case GUMSTIX_TOBI_DUO:
 280                 printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
 281                         expansion_config.revision,
 282                         expansion_config.fab_revision);
 283                 /* second lan chip */
 284                 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4],
 285                     0x2B000000, GPMC_SIZE_16M);
 286                 break;
 287         case GUMSTIX_PALO35:
 288                 printf("Recognized Palo35 expansion board (rev %d %s)\n",
 289                         expansion_config.revision,
 290                         expansion_config.fab_revision);
 291                 setenv("defaultdisplay", "lcd35");
 292                 break;
 293         case GUMSTIX_PALO43:
 294                 printf("Recognized Palo43 expansion board (rev %d %s)\n",
 295                         expansion_config.revision,
 296                         expansion_config.fab_revision);
 297                 setenv("defaultdisplay", "lcd43");
 298                 break;
 299         case GUMSTIX_CHESTNUT43:
 300                 printf("Recognized Chestnut43 expansion board (rev %d %s)\n",
 301                         expansion_config.revision,
 302                         expansion_config.fab_revision);
 303                 setenv("defaultdisplay", "lcd43");
 304                 break;
 305         case GUMSTIX_PINTO:
 306                 printf("Recognized Pinto expansion board (rev %d %s)\n",
 307                         expansion_config.revision,
 308                         expansion_config.fab_revision);
 309                 break;
 310         case GUMSTIX_GALLOP43:
 311                 printf("Recognized Gallop43 expansion board (rev %d %s)\n",
 312                         expansion_config.revision,
 313                         expansion_config.fab_revision);
 314                 setenv("defaultdisplay", "lcd43");
 315                 break;
 316         case ETTUS_USRP_E:
 317                 printf("Recognized Ettus Research USRP-E (rev %d %s)\n",
 318                         expansion_config.revision,
 319                         expansion_config.fab_revision);
 320                 MUX_USRP_E();
 321                 setenv("defaultdisplay", "dvi");
 322                 break;
 323         case GUMSTIX_NO_EEPROM:
 324                 puts("No EEPROM on expansion board\n");
 325                 break;
 326         default:
 327                 puts("Unrecognized expansion board\n");
 328         }
 329
 330         if (expansion_config.content == 1)
 331                 setenv(expansion_config.env_var, expansion_config.env_setting);
 332
 333         dieid_num_r();
 334
 335         return 0;
 336 }
 337
 338 /*
 339  * Routine: set_muxconf_regs
 340  * Description: Setting up the configuration Mux registers specific to the
 341  *              hardware. Many pins need to be moved from protect to primary
 342  *              mode.
 343  */
 344 void set_muxconf_regs(void)
 345 {
 346         MUX_OVERO();
 347 }
 348
 349 #if defined(CONFIG_CMD_NET)
 350 /*
 351  * Routine: setup_net_chip
 352  * Description: Setting up the configuration GPMC registers specific to the
 353  *            Ethernet hardware.
 354  */
 355 static void setup_net_chip(void)
 356 {
 357         struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
 358
 359         /* first lan chip */
 360         enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000,
 361                         GPMC_SIZE_16M);
 362
 363         /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
 364         writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
 365         /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
 366         writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
 367         /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
 368         writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
 369                 &ctrl_base->gpmc_nadv_ale);
 370
 371         /* Make GPIO 64 as output pin and send a magic pulse through it */
 372         if (!gpio_request(64, "")) {
 373                 gpio_direction_output(64, 0);
 374                 gpio_set_value(64, 1);
 375                 udelay(1);
 376                 gpio_set_value(64, 0);
 377                 udelay(1);
 378                 gpio_set_value(64, 1);
 379         }
 380 }
 381 #endif
 382
 383 int board_eth_init(bd_t *bis)
 384 {
 385         int rc = 0;
 386 #ifdef CONFIG_SMC911X
 387         rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
 388 #endif
 389         return rc;
 390 }
 391
 392 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
 393 int board_mmc_init(bd_t *bis)
 394 {
 395         return omap_mmc_init(0, 0, 0, -1, -1);
 396 }
 397 #endif