board/overo/overo.c

   1 /*
   2  * Maintainer : Steve Sakoman <steve@sakoman.com>
   3  *
   4  * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
   5  *      Richard Woodruff <r-woodruff2@ti.com>
   6  *      Syed Mohammed Khasim <khasim@ti.com>
   7  *      Sunil Kumar <sunilsaini05@gmail.com>
   8  *      Shashi Ranjan <shashiranjanmca05@gmail.com>
   9  *
  10  * (C) Copyright 2004-2008
  11  * Texas Instruments, <www.ti.com>
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  */
  31 #include <common.h>
  32 #include <netdev.h>
  33 #include <twl4030.h>
  34 #include <linux/mtd/nand.h>
  35 #include <asm/io.h>
  36 #include <asm/arch/mmc_host_def.h>
  37 #include <asm/arch/mux.h>
  38 #include <asm/arch/mem.h>
  39 #include <asm/arch/sys_proto.h>
  40 #include <asm/arch/omap_gpmc.h>
  41 #include <asm/gpio.h>
  42 #include <asm/mach-types.h>
  43 #include "overo.h"
  44
  45 DECLARE_GLOBAL_DATA_PTR;
  46
  47 #define TWL4030_I2C_BUS                 0
  48 #define EXPANSION_EEPROM_I2C_BUS        2
  49 #define EXPANSION_EEPROM_I2C_ADDRESS    0x51
  50
  51 #define GUMSTIX_SUMMIT                  0x01000200
  52 #define GUMSTIX_TOBI                    0x02000200
  53 #define GUMSTIX_TOBI_DUO                0x03000200
  54 #define GUMSTIX_PALO35                  0x04000200
  55 #define GUMSTIX_PALO43                  0x05000200
  56 #define GUMSTIX_CHESTNUT43              0x06000200
  57 #define GUMSTIX_PINTO                   0x07000200
  58 #define GUMSTIX_GALLOP43                0x08000200
  59
  60 #define ETTUS_USRP_E                    0x01000300
  61
  62 #define GUMSTIX_NO_EEPROM               0xffffffff
  63
  64 static struct {
  65         unsigned int device_vendor;
  66         unsigned char revision;
  67         unsigned char content;
  68         char fab_revision[8];
  69         char env_var[16];
  70         char env_setting[64];
  71 } expansion_config;
  72
  73 #if defined(CONFIG_CMD_NET)
  74 static void setup_net_chip(void);
  75 #endif
  76
  77 /* GPMC definitions for LAN9221 chips on Tobi expansion boards */
  78 static const u32 gpmc_lan_config[] = {
  79     NET_LAN9221_GPMC_CONFIG1,
  80     NET_LAN9221_GPMC_CONFIG2,
  81     NET_LAN9221_GPMC_CONFIG3,
  82     NET_LAN9221_GPMC_CONFIG4,
  83     NET_LAN9221_GPMC_CONFIG5,
  84     NET_LAN9221_GPMC_CONFIG6,
  85     /*CONFIG7- computed as params */
  86 };
  87
  88 /*
  89  * Routine: board_init
  90  * Description: Early hardware init.
  91  */
  92 int board_init(void)
  93 {
  94         gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
  95         /* board id for Linux */
  96         gd->bd->bi_arch_number = MACH_TYPE_OVERO;
  97         /* boot param addr */
  98         gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
  99
 100         return 0;
 101 }
 102
 103 /*
 104  * Routine: omap_rev_string
 105  * Description: For SPL builds output board rev
 106  */
 107 #ifdef CONFIG_SPL_BUILD
 108 void omap_rev_string(void)
 109 {
 110 }
 111 #endif
 112
 113 /*
 114  * Routine: get_board_revision
 115  * Description: Returns the board revision
 116  */
 117 int get_board_revision(void)
 118 {
 119         int revision;
 120
 121 #ifdef CONFIG_DRIVER_OMAP34XX_I2C
 122         unsigned char data;
 123
 124         /* board revisions <= R2410 connect 4030 irq_1 to gpio112             */
 125         /* these boards should return a revision number of 0                  */
 126         /* the code below forces a 4030 RTC irq to ensure that gpio112 is low */
 127         i2c_set_bus_num(TWL4030_I2C_BUS);
 128         data = 0x01;
 129         i2c_write(0x4B, 0x29, 1, &data, 1);
 130         data = 0x0c;
 131         i2c_write(0x4B, 0x2b, 1, &data, 1);
 132         i2c_read(0x4B, 0x2a, 1, &data, 1);
 133 #endif
 134
 135         if (!gpio_request(112, "") &&
 136             !gpio_request(113, "") &&
 137             !gpio_request(115, "")) {
 138
 139                 gpio_direction_input(112);
 140                 gpio_direction_input(113);
 141                 gpio_direction_input(115);
 142
 143                 revision = gpio_get_value(115) << 2 |
 144                            gpio_get_value(113) << 1 |
 145                            gpio_get_value(112);
 146         } else {
 147                 puts("Error: unable to acquire board revision GPIOs\n");
 148                 revision = -1;
 149         }
 150
 151         return revision;
 152 }
 153
 154 #ifdef CONFIG_SPL_BUILD
 155 /*
 156  * Routine: get_board_mem_timings
 157  * Description: If we use SPL then there is no x-loader nor config header
 158  * so we have to setup the DDR timings ourself on both banks.
 159  */
 160 void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
 161                 u32 *mr)
 162 {
 163         *mr = MICRON_V_MR_165;
 164         switch (get_board_revision()) {
 165         case REVISION_0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */
 166                 *mcfg = MICRON_V_MCFG_165(128 << 20);
 167                 *ctrla = MICRON_V_ACTIMA_165;
 168                 *ctrlb = MICRON_V_ACTIMB_165;
 169                 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 170                 break;
 171         case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */
 172                 *mcfg = MICRON_V_MCFG_165(256 << 20);
 173                 *ctrla = MICRON_V_ACTIMA_165;
 174                 *ctrlb = MICRON_V_ACTIMB_165;
 175                 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 176                 break;
 177         case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */
 178                 *mcfg = HYNIX_V_MCFG_165(256 << 20);
 179                 *ctrla = HYNIX_V_ACTIMA_165;
 180                 *ctrlb = HYNIX_V_ACTIMB_165;
 181                 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 182                 break;
 183         default:
 184                 *mcfg = MICRON_V_MCFG_165(128 << 20);
 185                 *ctrla = MICRON_V_ACTIMA_165;
 186                 *ctrlb = MICRON_V_ACTIMB_165;
 187                 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 188         }
 189 }
 190 #endif
 191
 192 /*
 193  * Routine: get_sdio2_config
 194  * Description: Return information about the wifi module connection
 195  *              Returns 0 if the module connects though a level translator
 196  *              Returns 1 if the module connects directly
 197  */
 198 int get_sdio2_config(void)
 199 {
 200         int sdio_direct;
 201
 202         if (!gpio_request(130, "") && !gpio_request(139, "")) {
 203
 204                 gpio_direction_output(130, 0);
 205                 gpio_direction_input(139);
 206
 207                 sdio_direct = 1;
 208                 gpio_set_value(130, 0);
 209                 if (gpio_get_value(139) == 0) {
 210                         gpio_set_value(130, 1);
 211                         if (gpio_get_value(139) == 1)
 212                                 sdio_direct = 0;
 213                 }
 214
 215                 gpio_direction_input(130);
 216         } else {
 217                 puts("Error: unable to acquire sdio2 clk GPIOs\n");
 218                 sdio_direct = -1;
 219         }
 220
 221         return sdio_direct;
 222 }
 223
 224 /*
 225  * Routine: get_expansion_id
 226  * Description: This function checks for expansion board by checking I2C
 227  *              bus 2 for the availability of an AT24C01B serial EEPROM.
 228  *              returns the device_vendor field from the EEPROM
 229  */
 230 unsigned int get_expansion_id(void)
 231 {
 232         i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
 233
 234         /* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */
 235         if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
 236                 i2c_set_bus_num(TWL4030_I2C_BUS);
 237                 return GUMSTIX_NO_EEPROM;
 238         }
 239
 240         /* read configuration data */
 241         i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
 242                  sizeof(expansion_config));
 243
 244         i2c_set_bus_num(TWL4030_I2C_BUS);
 245
 246         return expansion_config.device_vendor;
 247 }
 248
 249 /*
 250  * Routine: misc_init_r
 251  * Description: Configure board specific parts
 252  */
 253 int misc_init_r(void)
 254 {
 255         twl4030_power_init();
 256         twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
 257
 258 #if defined(CONFIG_CMD_NET)
 259         setup_net_chip();
 260 #endif
 261
 262         printf("Board revision: %d\n", get_board_revision());
 263
 264         switch (get_sdio2_config()) {
 265         case 0:
 266                 puts("Tranceiver detected on mmc2\n");
 267                 MUX_OVERO_SDIO2_TRANSCEIVER();
 268                 break;
 269         case 1:
 270                 puts("Direct connection on mmc2\n");
 271                 MUX_OVERO_SDIO2_DIRECT();
 272                 break;
 273         default:
 274                 puts("Unable to detect mmc2 connection type\n");
 275         }
 276
 277         switch (get_expansion_id()) {
 278         case GUMSTIX_SUMMIT:
 279                 printf("Recognized Summit expansion board (rev %d %s)\n",
 280                         expansion_config.revision,
 281                         expansion_config.fab_revision);
 282                 setenv("defaultdisplay", "dvi");
 283                 break;
 284         case GUMSTIX_TOBI:
 285                 printf("Recognized Tobi expansion board (rev %d %s)\n",
 286                         expansion_config.revision,
 287                         expansion_config.fab_revision);
 288                 setenv("defaultdisplay", "dvi");
 289                 break;
 290         case GUMSTIX_TOBI_DUO:
 291                 printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
 292                         expansion_config.revision,
 293                         expansion_config.fab_revision);
 294                 /* second lan chip */
 295                 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4],
 296                     0x2B000000, GPMC_SIZE_16M);
 297                 break;
 298         case GUMSTIX_PALO35:
 299                 printf("Recognized Palo35 expansion board (rev %d %s)\n",
 300                         expansion_config.revision,
 301                         expansion_config.fab_revision);
 302                 setenv("defaultdisplay", "lcd35");
 303                 break;
 304         case GUMSTIX_PALO43:
 305                 printf("Recognized Palo43 expansion board (rev %d %s)\n",
 306                         expansion_config.revision,
 307                         expansion_config.fab_revision);
 308                 setenv("defaultdisplay", "lcd43");
 309                 break;
 310         case GUMSTIX_CHESTNUT43:
 311                 printf("Recognized Chestnut43 expansion board (rev %d %s)\n",
 312                         expansion_config.revision,
 313                         expansion_config.fab_revision);
 314                 setenv("defaultdisplay", "lcd43");
 315                 break;
 316         case GUMSTIX_PINTO:
 317                 printf("Recognized Pinto expansion board (rev %d %s)\n",
 318                         expansion_config.revision,
 319                         expansion_config.fab_revision);
 320                 break;
 321         case GUMSTIX_GALLOP43:
 322                 printf("Recognized Gallop43 expansion board (rev %d %s)\n",
 323                         expansion_config.revision,
 324                         expansion_config.fab_revision);
 325                 setenv("defaultdisplay", "lcd43");
 326                 break;
 327         case ETTUS_USRP_E:
 328                 printf("Recognized Ettus Research USRP-E (rev %d %s)\n",
 329                         expansion_config.revision,
 330                         expansion_config.fab_revision);
 331                 MUX_USRP_E();
 332                 setenv("defaultdisplay", "dvi");
 333                 break;
 334         case GUMSTIX_NO_EEPROM:
 335                 puts("No EEPROM on expansion board\n");
 336                 break;
 337         default:
 338                 puts("Unrecognized expansion board\n");
 339         }
 340
 341         if (expansion_config.content == 1)
 342                 setenv(expansion_config.env_var, expansion_config.env_setting);
 343
 344         dieid_num_r();
 345
 346         return 0;
 347 }
 348
 349 /*
 350  * Routine: set_muxconf_regs
 351  * Description: Setting up the configuration Mux registers specific to the
 352  *              hardware. Many pins need to be moved from protect to primary
 353  *              mode.
 354  */
 355 void set_muxconf_regs(void)
 356 {
 357         MUX_OVERO();
 358 }
 359
 360 #if defined(CONFIG_CMD_NET)
 361 /*
 362  * Routine: setup_net_chip
 363  * Description: Setting up the configuration GPMC registers specific to the
 364  *            Ethernet hardware.
 365  */
 366 static void setup_net_chip(void)
 367 {
 368         struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
 369
 370         /* first lan chip */
 371         enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000,
 372                         GPMC_SIZE_16M);
 373
 374         /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
 375         writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
 376         /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
 377         writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
 378         /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
 379         writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
 380                 &ctrl_base->gpmc_nadv_ale);
 381
 382         /* Make GPIO 64 as output pin and send a magic pulse through it */
 383         if (!gpio_request(64, "")) {
 384                 gpio_direction_output(64, 0);
 385                 gpio_set_value(64, 1);
 386                 udelay(1);
 387                 gpio_set_value(64, 0);
 388                 udelay(1);
 389                 gpio_set_value(64, 1);
 390         }
 391 }
 392 #endif
 393
 394 int board_eth_init(bd_t *bis)
 395 {
 396         int rc = 0;
 397 #ifdef CONFIG_SMC911X
 398         rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
 399 #endif
 400         return rc;
 401 }
 402
 403 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
 404 int board_mmc_init(bd_t *bis)
 405 {
 406         omap_mmc_init(0, 0, 0);
 407         return 0;
 408 }
 409 #endif