board/pcippc2/pcippc2.c

   1 /*
   2  * (C) Copyright 2002
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <config.h>
  25 #include <common.h>
  26 #include <command.h>
  27 #include <asm/io.h>
  28 #include <linux/mtd/doc2000.h>
  29 #include <watchdog.h>
  30 #include <pci.h>
  31 #include <netdev.h>
  32
  33 #include "hardware.h"
  34 #include "pcippc2.h"
  35 #include "sconsole.h"
  36 #include "fpga_serial.h"
  37
  38 DECLARE_GLOBAL_DATA_PTR;
  39
  40 #if defined(CONFIG_WATCHDOG)
  41
  42 static int pcippc2_wdt_init_done = 0;
  43
  44 void pcippc2_wdt_init (void);
  45
  46 #endif
  47
  48   /* Check board identity
  49    */
  50 int checkboard (void)
  51 {
  52 #ifdef CONFIG_PCIPPC2
  53         puts ("Board: Gespac PCIPPC-2\n");
  54 #else
  55         puts ("Board: Gespac PCIPPC-6\n");
  56 #endif
  57         return 0;
  58 }
  59
  60   /* RAM size is stored in CPC0_RGBAN1
  61    */
  62 u32 pcippc2_sdram_size (void)
  63 {
  64         return in32 (REG (CPC0, RGBAN1));
  65 }
  66
  67 phys_size_t initdram (int board_type)
  68 {
  69         return cpc710_ram_init ();
  70 }
  71
  72 int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  73 {
  74         out32 (REG (CPC0, SPOR), 0);
  75         iobarrier_rw ();
  76         while (1);
  77         /* notreached */
  78         return (-1);
  79 }
  80
  81 int board_early_init_f (void)
  82 {
  83         out32 (REG (CPC0, RSTR), 0xC0000000);
  84         iobarrier_rw ();
  85
  86         out32 (REG (CPC0, RSTR), 0xF0000000);
  87         iobarrier_rw ();
  88
  89         out32 (REG (CPC0, UCTL), 0x00F80000);
  90
  91         out32 (REG (CPC0, SIOC0), 0x30000000);
  92
  93         out32 (REG (CPC0, ABCNTL), 0x00000000);
  94
  95         out32 (REG (CPC0, SESR), 0x00000000);
  96         out32 (REG (CPC0, SEAR), 0x00000000);
  97
  98         /* Detect IBM Avignon CPC710 Revision */
  99         if ((in32 (REG (CPC0, UCTL)) & 0x000000F0) == CPC710_TYPE_100P)
 100                 out32 (REG (CPC0, PGCHP), 0xA0000040);
 101         else
 102                 out32 (REG (CPC0, PGCHP), 0x80800040);
 103
 104
 105         out32 (REG (CPC0, ATAS), 0x709C2508);
 106
 107         iobarrier_rw ();
 108
 109         return 0;
 110 }
 111
 112 void after_reloc (ulong dest_addr)
 113 {
 114         /* Jump to the main U-Boot board init code
 115          */
 116         board_init_r ((gd_t *)gd, dest_addr);
 117 }
 118
 119 int misc_init_r (void)
 120 {
 121         pcippc2_fpga_init ();
 122
 123         pcippc2_cpci3264_init ();
 124
 125 #if defined(CONFIG_WATCHDOG)
 126         pcippc2_wdt_init ();
 127 #endif
 128
 129         fpga_serial_init (sconsole_get_baudrate ());
 130
 131         sconsole_putc   = fpga_serial_putc;
 132         sconsole_puts   = fpga_serial_puts;
 133         sconsole_getc   = fpga_serial_getc;
 134         sconsole_tstc   = fpga_serial_tstc;
 135         sconsole_setbrg = fpga_serial_setbrg;
 136
 137         sconsole_flush ();
 138         return (0);
 139 }
 140
 141 void pci_init_board (void)
 142 {
 143         cpc710_pci_init ();
 144
 145         /* FPGA requires no retry timeouts to be enabled
 146          */
 147         cpc710_pci_enable_timeout ();
 148 }
 149
 150 void doc_init (void)
 151 {
 152         doc_probe (pcippc2_fpga1_phys + HW_FPGA1_DOC);
 153 }
 154
 155 void pcippc2_cpci3264_init (void)
 156 {
 157   pci_dev_t             bdf = pci_find_device(FPGA_VENDOR_ID, FPGA_DEVICE_ID, 0);
 158
 159   if (bdf == -1)
 160   {
 161     puts("Unable to find FPGA !\n");
 162     hang();
 163   }
 164
 165         if((in32(pcippc2_fpga0_phys + HW_FPGA0_BOARD) & 0x01000000) == 0x01000000)
 166         /* 32-bits Compact PCI bus - LSB bit */
 167         {
 168                 iobarrier_rw();
 169                 out32(BRIDGE(CPCI, PCIDG), 0x40000000); /* 32-bits bridge, Pipeline */
 170                 iobarrier_rw();
 171         }
 172 }
 173
 174 #if defined(CONFIG_WATCHDOG)
 175
 176 void pcippc2_wdt_init (void)
 177 {
 178         out16r (FPGA (WDT, PROG), 0xffff);
 179         out8 (FPGA (WDT, CTRL), 0x1);
 180
 181         pcippc2_wdt_init_done = 1;
 182 }
 183
 184 void pcippc2_wdt_done (void)
 185 {
 186         out8 (FPGA (WDT, CTRL), 0x0);
 187
 188         pcippc2_wdt_init_done = 0;
 189 }
 190
 191 void pcippc2_wdt_reset (void)
 192 {
 193         if (pcippc2_wdt_init_done == 1)
 194                 out8 (FPGA (WDT, REFRESH), 0x56);
 195 }
 196
 197 void watchdog_reset (void)
 198 {
 199         int re_enable = disable_interrupts ();
 200
 201         pcippc2_wdt_reset ();
 202         if (re_enable)
 203                 enable_interrupts ();
 204 }
 205
 206 #if defined(CONFIG_CMD_BSP)
 207 int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 208 {
 209         switch (argc) {
 210         case 1:
 211                 printf ("Watchdog timer status is %s\n",
 212                         pcippc2_wdt_init_done == 1 ? "on" : "off");
 213
 214                 return 0;
 215         case 2:
 216                 if (!strcmp(argv[1],"on")) {
 217                         pcippc2_wdt_init();
 218                         printf("Watchdog timer now is on\n");
 219
 220                         return 0;
 221
 222                 } else if (!strcmp(argv[1],"off")) {
 223                         pcippc2_wdt_done();
 224                         printf("Watchdog timer now is off\n");
 225
 226                         return 0;
 227
 228                 } else
 229                         break;
 230         default:
 231                 break;
 232         }
 233         cmd_usage(cmdtp);
 234         return 1;
 235 }
 236
 237 U_BOOT_CMD(
 238         wd,     2,      1,      do_wd,
 239         "wd      - check and set watchdog\n",
 240         "on   - switch watchDog on\n"
 241         "wd off  - switch watchdog off\n"
 242         "wd      - print current status\n"
 243 );
 244
 245 #endif
 246 #endif  /* CONFIG_WATCHDOG */
 247
 248 int board_eth_init(bd_t *bis)
 249 {
 250         return pci_eth_init(bis);
 251 }